CD14538BMS: CMOS DUAL PREC MONOSTABLE MULTIVIBRATOR

CD14538BMS dual precision monostable multivibrator provides stable retriggerable/ resettable one-shot operation for any fixed-voltage timing application. An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Precision control of output pulse widths is achieved through linear CMOS techniques.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538BMS is not used, its inputs must be tied to either VDD or VSS. See Table 1.

In normal operation the circuit retriggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time period (T) for this multivibrator can be calculated by: T = RXCX.

The minimum value of external resistance, RX is 4KΩ. The minimum and maximum values of external capacitance, CX, are 0pF and 100µF, respectively. The CD14538BMS is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B**.

* T = 0.5 RXCX for CX ≥ 1000pF.

* T = RX CX; CX min = 5000pF.

The CD14538BMS is supplied in these 16-lead outline packages:

Braze Seal DIP H4X
Frit Seal DIP H1L
Ceramic Flatpack H6W

Key Features
  • High-Voltage Type (20V Rating)
  • Retriggerable/Resettable Capability
  • Trigger and Reset Propagation Delays Independent of RX, CX
  • Triggering From Leading or Trailing Edge
  • Q and Q Buffered Outputs Available
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt-Trigger Input Allows Unlimited Rise and Fall Times On +TR and -TR Inputs
  • 100% Tested For Maximum Quiescent Current at 20V
  • Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range:
    • 100nA at 18V and +25oC
  • Noise Margin (Full Package-Temperature Range):
    • 1V at VDD = 5V
    • 2V at VDD = 10V
    • 2.5V at VDD = 15V
  • 5V, 10V and 15V Parametric Ratings
  • Standardized Symmetrical Output Characteristics
  • Meets All Requirements of JEDEC Tentative Standards No. 13B, "Standard Specifications for Description of "B" Series CMOS Device's
Applications
  • Pulse Delay and Timing
  • Pulse Shaping
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9867: End of Life Derating: A Necessity or Over KillPDF13 Nov 201435 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
CD14538BMS DatasheetPDF21 Nov 2014237 KB
Standard Microcircuit Drawings
TitleTypeUpdatedSizeOther Languages
SMD 5962-96702 (CD14538BMS)PDF12 Jan 2015
Miscellaneous
TitleTypeUpdatedSizeOther Languages
Intersil Commercial Lab ServicesPDF18 Nov 2014364 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
CD14538BDMSR16 Ld SBDIP1.3716N/ANARoHS
CD14538BKMSR16 Ld CFP0.5916N/ANARoHS
CD14538BMS Datasheet 21 Nov 2014
AN9867: End of Life Derating: A Necessity or Over Kill 13 Nov 2014
SMD 5962-96702 (CD14538BMS) 12 Jan 2015
Intersil Commercial Lab Services 18 Nov 2014