HM-6514-883: 1024x4 CMOS RAM

The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation. On chip latches are provided for addresses allowing efficient interfacing with microprocessor systems. The data output can be forced to a high impedance state for use in expanded memory arrays.

Gated inputs allow lower operating current and also eliminates the need for pull up or pull down resistors. The HM-6514/883 is fully static RAM and may be maintained in any state for an indefinite period of time. Data retention supply voltage and supply current are guaranteed over temperature.

Key Features
  • This Circuit is Processed in Accordance to MIL-STD- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • Low Power Standby 125µW Max
  • Low Power Operation 35mW/MHz Max
  • Data Retention at 2.0V Min
  • TTL Compatible Input/Output
  • Common Data Input/Output
  • Three-State Output
  • Standard JEDEC Pinout
  • Fast Access Time 120/200ns Max
  • 18 Pin Package for High Density
  • Gated Inputs - No Pull Up or Pull Down Resistors Required
  • On-Chip Address Register
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9867: End of Life Derating: A Necessity or Over KillPDF13 Nov 201435 KB
AN9654: Use of Life Tested PartsPDF13 Nov 201458 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
HM-6514/883 DatasheetPDF14 Nov 2014184 KB
Miscellaneous
TitleTypeUpdatedSizeOther Languages
Intersil Commercial Lab ServicesPDF18 Nov 2014364 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
24502BVA18 Ld CERDIP2.618N/ANA
HM1-6514/88318 Ld CERDIP2.618N/ANA
HM1-6514B/88318 Ld CERDIP2.618N/ANA
HM-6514/883 Datasheet 14 Nov 2014
18 Ld CERDIP HM-6514-883
HM-6514-883
AN9867: End of Life Derating: A Necessity or Over Kill 13 Nov 2014
AN9654: Use of Life Tested Parts 13 Nov 2014
Intersil Commercial Lab Services 18 Nov 2014