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The ISL5239 Pre-Distortion Linearizer (PDL) is a full featured component for Power Amplifier (PA) linearization to improve PA power efficiency and reduce PA cost.

The Radio Frequency (RF) PA is one of the most expensive and power-consuming devices in any wireless communication system. The ideal RF PA would have an entirely linear relationship between input and output, expressed as a simple gain which applies at all power levels. Unfortunately, realizable RF amplifiers are not completely linear and the use of predistortion techniques allows the substitution of lower cost/power PA's for higher cost/power PA's.

The ISL5239 pre-distortion linearizer enables the linearization of less expensive PA's to provide more efficient operation closer to saturation. This provides the benefit of improved linearity and efficiency, while reducing PA cost and operational expense.

The ISL5239 features a 125MHz pre-distortion bandwidth capable of full 5th order intermodulation correction for signal bandwidths up to 20MHz. This bandwidth is particularly well suited for 3G cellular deployments of UMTS and CDMA2000. The device also corrects for PA memory effects that limit predistortion performance including self heating.

The ISL5239 combines an input formatter and interpolator, predistortion linearizer, an IF converter, correction filter, gain/phase/offset adjustment, output formatter, and input and feedback capture memories into a single chip controlled by a 16- bit linearizer interface.

The ISL5239 supports log of power, linear magnitude, and linear power based pre-distortion, utilizing two Look-Up Table (LUT) based algorithms for the pre-distortion correction. The device provides programmable scaling and offset correction, and provides for phase imbalance adjustment.

Key Features

• Output Sample Rates Up to 125MSPS
• Full 20MHz Signal Bandwidth
• Dynamic Memory Effects Compensation
• Input and Feedback Capture Memories
• LUT-based Digital Pre-distortion
• Two 18-bit Output Busses with Programmable Bit-Width
• 16-Bit Parallel µProcessor Interface
• Input Interpolator x2, x4, x8
• Programmable Frequency Response Correction
• Low Power Architecture
• Threshold Comparator for Internal Triggering
• Quadrature or Digital IF Architecture
• Lowest-Cost Full-Featured Part Available
• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Base Station Power Amplifier Linearization
• Operates with ISL5217 in Software Radio Solutions
• Compatible with the ISL5961 or ISL5929 D/A Converters