X5323: CPU Supervisor with 32Kb SPI EEPROM

These devices combine four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code. The Watchdog Timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the RESET/RESET signal. The user selects the interval from three preset values. Once selected, the interval does not change, even after cycling the power. The device's low VCC detection circuitry protects the user's system from low voltage conditions, resetting the system when VCC falls below the minimum VCC trip point. RESET/RESET is asserted until VCC returns to proper operating level and stabilizes. Five industry standard TRIP thresholds are available, however, Intersil's unique circuits allow the threshold to be reprogrammed to meet custom requirements or to fine-tune the threshold for applications requiring higher precision.

Key Features
  • Selectable watchdog timer
  • Low VCC detection and reset assertion
    • Five standard reset threshold voltages
    • Re-program low VCC reset threshold voltage using special programming sequence
    • Reset signal valid to VCC = 1V
  • Determine watchdog or low voltage reset with a volatile flag bit
  • Long battery life with low power consumption
    • <50µA max standby current, watchdog on
    • <1µA max standby current, watchdog off
    • <400µA max active current during read
  • 32Kbits of EEPROM
  • Built-in inadvertent write protection
    • Power-up/power-down protection circuitry
    • Protect 0, 1/4, 1/2 or all of EEPROM array with Block Lock™ protection
    • In circuit programmable ROM mode
  • 2MHz SPI interface modes (0,0 & 1,1)
  • Minimize EEPROM programming time
    • 32-byte page write mode
    • Self-timed write cycle
    • 5ms write cycle time (typical)
  • 2.7V to 5.5V and 4.5V to 5.5V power supply operation
  • Available packages
    • 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
  • Pb-free plus anneal available (RoHS compliant)
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN98: Interfacing the Intersil X5163/323/643 CPU Supervisors to NEC 78K MicrocontrollersPDF13 Nov 2014128 KB
AN1141: Using the Intersil X5163/X5323/X5643 CPU Supervisors w/68HC11 MicrocontrollerPDF13 Nov 2014144 KB
AN1143: Designing with Intersil's X5000 Series CPU SupervisorsPDF13 Nov 2014109 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
X5323, X5325 DatasheetPDF09 Dec 2015392 KB
White Papers
TitleTypeUpdatedSizeOther Languages
Five Easy Steps to Create a Multi-Load Power SolutionPDF30 Jan 2017502 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
X5323P8 Ld PDIP0.548N/ANA
X5323P-2.78 Ld PDIP0.548N/ANA
X5323P-2.7A8 Ld PDIP0.548N/ANA
X5323P-4.5A8 Ld PDIP0.548N/ANA
X5323PI8 Ld PDIP0.548N/ANA
X5323PI-2.78 Ld PDIP0.548N/ANA
X5323PI-2.7A8 Ld PDIP0.548N/ANA
X5323PI-4.5A8 Ld PDIP0.548N/ANA
X5323PIZ8 Ld PDIP0.548N/ANARoHS
X5323PIZ-2.78 Ld PDIP0.548N/ANARoHS
X5323PIZ-2.7A8 Ld PDIP0.548N/ANARoHS
X5323PIZ-4.5A8 Ld PDIP0.548N/ANARoHS
X5323PZ8 Ld PDIP0.548N/ANARoHS
X5323PZ-2.78 Ld PDIP0.548N/ANARoHS
X5323PZ-2.7A8 Ld PDIP0.548N/ANARoHS
X5323PZ-4.5A8 Ld PDIP0.548N/ANARoHS
X5323S88 Ld SOIC0.0728240
X5323S8-2.78 Ld SOIC0.0728240
X5323S8-2.7A8 Ld SOIC0.0728240
X5323S8-2.7AT18 Ld SOIC T+R0.0728240
X5323S8-2.7T18 Ld SOIC T+R0.0728240
X5323S8-4.5A8 Ld SOIC0.0728240
X5323S8I8 Ld SOIC0.0728240
X5323S8I-2.78 Ld SOIC0.0728240
X5323S8I-2.7A8 Ld SOIC0.0728240
X5323S8I-2.7AT18 Ld SOIC T+R0.0728240
X5323S8I-2.7T18 Ld SOIC T+R0.0728240
X5323S8I-4.5A8 Ld SOIC0.0728240
X5323S8I-4.5AT18 Ld SOIC T+R0.0728240
X5323S8IT18 Ld SOIC T+R0.0728240
X5323S8IZ8 Ld SOIC0.07281260RoHS
X5323S8IZ-2.78 Ld SOIC0.07281260RoHS
X5323S8IZ-2.7A8 Ld SOIC0.07281260RoHS
X5323S8IZ-2.7AT18 Ld SOIC T+R0.07281260RoHS
X5323S8IZ-2.7T18 Ld SOIC T+R0.07281260RoHS
X5323S8IZ-4.5A8 Ld SOIC0.07281260RoHS
X5323S8IZ-4.5AT18 Ld SOIC T+R0.07281260RoHS
X5323S8IZT18 Ld SOIC T+R0.07281260RoHS
X5323S8T18 Ld SOIC T+R0.0728240
X5323S8Z8 Ld SOIC0.07281260RoHS
X5323S8Z-2.78 Ld SOIC0.07281260RoHS
X5323S8Z-2.7A8 Ld SOIC0.07281260RoHS
X5323S8Z-2.7AT18 Ld SOIC T+R0.07281260RoHS
X5323S8Z-2.7T18 Ld SOIC T+R0.07281260RoHS
X5323S8Z-4.5A8 Ld SOIC0.07281260RoHS
X5323S8ZT18 Ld SOIC T+R0.07281260RoHS
X5323V1414 Ld TSSOP0.05414240
X5323V14-2.714 Ld TSSOP0.05414240
X5323V14-2.7A14 Ld TSSOP0.05414240
X5323V14-2.7T114 Ld TSSOP T+R0.05414240
X5323V14-4.5A14 Ld TSSOP0.05414240
X5323V14I14 Ld TSSOP0.05414240
X5323V14I-2.714 Ld TSSOP0.05414240
X5323V14I-2.7A14 Ld TSSOP0.05414240
X5323V14I-2.7T114 Ld TSSOP T+R0.05414240
X5323V14I-4.5A14 Ld TSSOP0.05414240
X5323V14IT114 Ld TSSOP T+R0.05414240
X5323V14IZ14 Ld TSSOP0.05414260RoHS
X5323V14IZ-2.714 Ld TSSOP0.05414260RoHS
X5323V14IZ-2.7A14 Ld TSSOP0.05414260RoHS
X5323V14IZ-2.7T114 Ld TSSOP T+R0.05414260RoHS
X5323V14IZ-4.5A14 Ld TSSOP0.05414260RoHS
X5323V14IZT114 Ld TSSOP T+R0.05414260RoHS
X5323V14T114 Ld TSSOP T+R0.05414240
X5323V14Z14 Ld TSSOP0.05414260RoHS
X5323V14Z-2.714 Ld TSSOP0.05414260RoHS
X5323V14Z-2.7A14 Ld TSSOP0.05414260RoHS
X5323V14Z-2.7T114 Ld TSSOP T+R0.05414260RoHS
X5323V14Z-4.5A14 Ld TSSOP0.05414260RoHS
X5323V14ZT114 Ld TSSOP T+R0.05414260RoHS
X5323, X5325 Datasheet 09 Dec 2015
AN98: Interfacing the Intersil X5163/323/643 CPU Supervisors to NEC 78K Microcontrollers 13 Nov 2014
AN1141: Using the Intersil X5163/X5323/X5643 CPU Supervisors w/68HC11 Microcontroller 13 Nov 2014
AN1143: Designing with Intersil's X5000 Series CPU Supervisors 13 Nov 2014
Five Easy Steps to Create a Multi-Load Power Solution 30 Jan 2017