产品特性

• 80MHz/105DMIPS, 32-bit MIPS M4K Core
• 5 Stage pipeline, Harvard architecture
• MIPS16e mode for up to 40% smaller code size
• Single cycle multiply and hardware divide unit
• 32 x 32-bit Core Registers
• 32 x 32-bit Shadow Registers
• Fast context switch and interrupt response
• 256K Flash (plus 12K boot Flash)
• 32K RAM (can execute from RAM)
• 4 Channel Hardware DMA Controller
• iFlow Trace: Real-time non-intrusive hardware instruction trace (5 Wire)
• Flash prefetch module with 256 Byte cache
• Lock instructions or data in cache for fast access
• Programmable vector interrupt controller
• Fast and Accurate 16 channel 10-bit ADC,
• Max 1 Mega samples per second at +/- 1LSB, conversion available during SLEEP & IDLE
• Fail-Safe Clock Monitor – allows safe shutdown if clock fails
• Hardware RTCC (Real-Time Clock and Calendar with Alarms)
• 2 Internal oscillators (8MHz & 31KHz)
• Watchdog Timer with separate RC oscillator
• Pin compatible with 16-bit PIC® MCUs

技术参数