产品特性

• Up to 16 MIPS operation (3.0 - 3.6V)
• Modified Harvard architecture
• 16-bit-wide data path
• 24-bit-wide instructions
• 16 x 16 integer multiply operations
• 32/16 and 16/16 integer divide operation
• Two 40-bit accumulators with rounding and saturationoptions
• Additional flexible and powerful addressingmodes:- Modulo- Bit-reversed
• Single-cycle multiply and accumulate:- Accumulator write back for DSP operations- Dual data fetch
• Shifts for up to 40-bit data
• 16 x 16 fractional multiply/divide operationsOn-Chip Flash and SRAM:
• Flash program memory (32 Kbytes)
• Data SRAM (2 Kbytes)
• Security for program FlashAnalog Peripherals:
• 10-bit, 1.1 Msps Analog-to-Digital Converter (ADC):- Two and four simultaneous samples- Up to 8 input channels with auto-scanning
• Three Analog Comparators with programmable input/output configuration- Up to four inputs per Comparator
• Charge Time Measurement Unit (CTMU):- Supports capacitive touch sensing for touchscreens and capacitive switches (mTouch™)Timers/Capture/Compare/PWM:
• Timer/Counters, up to five 16-bit timers:- Can pair up to make two 32-bit timers
• Input Capture (up to three channels)- Capture on up, down, or both edges- 16-bit capture input functions
• Output Compare (up to two channels)- Single or Dual 16-bit Compare mode
• Hardware Real-Time Clock and Calendar (RTCC)Communication Modules:
• 4-wire SPI
• I2C™
• UARTSystem Management:
• Flexible clock options
• High-accuracy internal FRC
• Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)Power Management:
• Single supply on-chip voltage regulator
• Switch between clock sources in real time
• Idle, Sleep, and Doze modes with fast wake-upPackaging:
• 28-pin SPDIP/SOIC/SSOP
• 28-pin QFN: 6x6 mm
• 36-pin TLA: 5x5 mm

技术参数