NB3W800LMNGEVB: 3.3 V 100/133 MHz Differential 1:8 HCSLCompatible Push-Pull Clock ZDB/Fanout Buffer for PCIe Evaluation Board

The NB3W800LMNGEVB Evaluation Board is designed to effectively evaluate the NB3W800L, which is a low−power 8−output differential buffer that meets all the performance requirements of the DB800ZL specification. The NB3W800L is capable of distributing the reference clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe Gen1/Gen2/Gen3, SAS, SATA, and Intel Scalable Memory Interconnect (Intel SMI) applications. A fixed, internal feedback path maintains low drift for critical QPI applications.

评估/开发工具信息
产品状况Compliance简短说明所用产品
NB3W800LMNGEVBActivePb-free3.3 V 100/133 MHz Differential 1:8 HCSLCompatible Push-Pull Clock ZDB/Fanout Buffer for PCIe Evaluation BoardNB3W800LMNG
NB3W800LMNTWG
NB3W800LMNTXG
技术文档
类型文档标题文档编号/大小修订号
Eval Board: ManualNB3W800LMNGEVB GUI Evaluation Board User's ManualEVBUM2330/D - 438 KB0
Eval Board: Test ProcedureNB3W800LMNGEVB Test ProcedureNB3W800LMNGEVB_TEST_PROCEDURE.pdf - 671 KB0
Eval Board: BOMNB3W800LMNGEVB Bill Of Materials (ROHS Compliant)NB3W800LMNGEVB_BOM_ROHS.pdf - 40 KB0
Eval Board: SchematicNB3W800LMNGEVB SchematicNB3W800LMNGEVB_SCHEMATIC.pdf - 356 KB0
Eval Board: ManualNB3W800LMNGEVB User's ManualNB3W800LMNGEVB_USERS_MANUAL.pdf - 1062 KB0
EVBUM2330/D - 438 KB NB3W800LMNGEVB
NB3W800LMNGEVB TEST PROCEDURE NB3W800LMNGEVB
NB3W800LMNGEVB BOM ROHS NB3W800LMNGEVB
NB3W800LMNGEVB SCHEMATIC NB3W800LMNGEVB
NB3W800LMNGEVB USERS MANUAL NB3W800LMNGEVB