NB3W800L: 3.3 V 100/133 MHz Differential 1:8 HCSL Compatible Push-Pull Clock ZDB/Fanout Buffer for PCIe
The NB3W800L is a low−power 8−output differential buffer that
meets all the performance requirements of the DB800ZL
specification. The NB3W800L is capable of distributing the reference
clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe
Gen1/Gen2/Gen3, SAS, SATA, and Intel Scalable Memory Interconnect
(Intel SMI) applications. A fixed, internal feedback path maintains low
drift for critical QPI applications.
特性- 8 Differential Clock Output Pairs @ 0.7 V
- Low−power NMOS Push−pull HCSL Compatible Outputs
- Output−to−output Skew <50 ps
- Input−to−output Delay Variation <100 ps
- PCIe Gen3 Phase Jitter <1.0 ps RMS
- QPI 9.6GT/s 12UI Phase Jitter <0.2 ps RMS
- Individual OE Control; Hardware Control of Each Output
- PLL Configurable for PLL Mode or Bypass Mode (Fanout Operation)
- 100 MHz or 133 MHz PLL Mode Operation; Supports PCIe and QPI Applications
- Selectable PLL Bandwidth; Minimizes Jitter Peaking in Downstream PLL’s
- Spread Spectrum Compatible; Tracks Input Clock Spreading for Low EMI
- SMBus Programmable Configurations
|
应用- Industrial
- Networking
- Computing
- Consumer
| 终端产品- Desktop
- Notebook
- Switches / Routers
- Servers
- Automated Test Equipment
|
仿真模型 (1)
| Document Title | Document ID/Size | Revision | Revision Date |
|---|
| NB3W800L | NB3W800L (66kB) | 0 | May, 2015 |
封装图纸 (1)
数据表 (1)
评估板文档 (5)
评估板与开发工具
| 产品 | 状况 | Compliance | 简短说明 |
|---|
| NB3W800LMNGEVB | Active | Pb-free | 3.3 V 100/133 MHz Differential 1:8 HCSLCompatible Push-Pull Clock ZDB/Fanout Buffer for PCIe Evaluation Board |
产品订购型号
| 产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| NB3W800LMNG | Active | Pb-free
Halide free | QFN-48 | 485DP | 3 | Tray JEDEC | 490 | 联系BDTIC |
| NB3W800LMNTWG | Active | Pb-free
Halide free | QFN-48 | 485DP | 3 | Tape and Reel | 2500 | 联系BDTIC |
| NB3W800LMNTXG | Active | Pb-free
Halide free | QFN-48 | 485DP | 3 | Tape and Reel | 2500 | 联系BDTIC |
订购产品技术参数
| Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
|---|
| NB3W800LMNG | Buffer | 1 | 1:8 | HCSL | HCSL | 3.3 | | 50 | 0 | 87.5 | 100
133.33 | |
| NB3W800LMNTWG | Buffer | 1 | 1:8 | HCSL | HCSL | 3.3 | | 50 | 0 | 87.5 | 133.33
100 | |
| NB3W800LMNTXG | Buffer | 1 | 1:8 | HCSL | HCSL | 3.3 | | 50 | 0 | 87.5 | 100
133.33 | |
