技术特性| Sub Family | LVDS SerDes | | Function | Deserializer | | Input Signal Type | LVDS | | Output Signal Type | LVCMOS | | No.of Rx | 10 | | Clock frequency (Min.)[MHz] | 8 | | Clock frequency (Max.)[MHz] | 160 | | Data Rates [Mbps] | 1120 | | Parallel Bus Width | 67 | | Supply Voltage(Min.)[V] | 2.3 | | Supply Voltage(Max.)[V] | 3.6 | | Supply Voltage(Typ.)[V] | 3.3 | | Operating Temperature (Min.)[°C] | -40 | | Operating Temperature (Max.)[°C] | 85 |
| 技术资料下载产品特点- The maximum data rate is 1120Mbps/Lane
- It enables to receive the 60bit of RGB data, 7bit of Timing and Control data
- Support clock frequency from 8MHz up to 160MHz
- Flexible Input/Output mode
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