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SPEAr310：Embedded MPU optimized for automation and consumer applications

The SPEAr310 is a member of the SPEAr family of embedded MPUs, optimized for telecom applications. It is based on the powerful ARM926EJ-S processor (up to 333 MHz), widely used in applications where high computation performance is required.

In addition, SPEAr310 has an MMU that allows virtual memory management -- making the system compliant with advanced operating systems, like Linux. It also offers 16 KB of data cache, 16 KB of instruction cache, JTAG and ETM (embedded trace macro-cell) for debug operations.

A full set of peripherals allows the system to be used in many applications, some typical applications being routers, switches and gateways as well as remote apparatus control and metering concentrators.

Key Features

• SecurityC3 Cryptographic accelerator
• Connectivity2 x USB 2.0 HostUSB 2.0 Device1 x fast Ethernet MII port4 x fast Ethernet SMII ports1 x SSP Synchronous serial peripheral (SPI, Microwire or TI protocol) with 4 chip selects1 x I2 C1 x fast IrDA interface6 x UART interface1x TDM/E1 HDLC interface with 128/32 timeslots per frame respectively2x RS485 HDLC ports
• ARM926EJ-S 333 MHz core
• Dynamic power-saving features
• High-performance 8-channel DMA
• Memory:32 KB ROM and 8 KB internal SRAMLPDDR-333/DDR2-666 external memory interfaceSerial Flash Memory interface (SMI)Flexible static memory controller (FSMC) up to 16-bit data bus width, supporting NAND FlashExternal memory interface (EMI) up to 32- bit data bus width, supporting NOR Flash and FPGAs
• Miscellaneous functionsIntegrated real time clock, watchdog, and system controller8-channel 10-bit ADC, 1 MspsJPEG CODEC acceleratorSix 16-bit general purpose timers with programmable prescaler, 4 capture inputsUp to 102 GPIOs with interrupt capability
• Configurable peripheral functions multiplexed on 102 shared I/Os

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