KAD5510P-50: 10-Bit, 500MSPS Single-Channel ADC, with LVDS/LVCMOS Outputs

The KAD5510P-50 is a low-power, high performance, 10-bit, 500MSPS analog-to-digital converter designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. The KAD5510P-50 is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS.

The device utilizes two time-interleaved 10-bit, 250MSPS A/D cores to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally.

A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of matching characteristics (gain, offset, skew) between the two converter cores. These adjustments allow the user to minimize spurs associated with the interleaving process.

Digital output data is presented in selectable LVDS or CMOS formats. The KAD5510P-50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).

Key Differences in Family
ProductsResolutionSpeed (MSPS)PackageDatasheetQ48EPQ72EP
KAD5514P-25
KAD5514P-21
KAD5514P-17
KAD5514P-12
14250/210/170/125XXkad5514p.pdf
KAD5512P-5012500Xkad5512p-50.pdf
KAD5512P-25
KAD5512P-21
KAD5512P-17
KAD5512P-12
12250/210/170/125XXkad5512p.pdf
KAD5512HP-25
KAD5512HP-21
KAD5512HP-17
KAD5512HP-12
12250/210/170/125XXkad5512hp.pdf
KAD5510P-5010500Xkad5510p-50.pdf
KAD5510P-25
KAD5510P-21
KAD5510P-17
KAD5510P-12 
10250/210/170/125Xkad5510p.pdf
Key Features
  • Programmable gain, offset and skew control
  • 1.3GHz analog input bandwidth
  • 60fs clock jitter
  • Over-range indicator
  • Selectable clock divider: ÷1 or ÷2
  • Clock phase selection
  • Nap and sleep modes
  • Two’s complement, gray code or binary data format
  • DDR LVDS-compatible or LVCMOS outputs
  • Programmable built-in test patterns
  • Single-supply 1.8V operation
  • Pb-free (RoHS compliant)Key Specifications
  • SNR = 60.7dBFS for fIN = 105MHz (-1dBFS)
  • SFDR = 83.2dBc for fIN = 105MHz (-1dBFS)
  • Power consumption = 414mW
Applications
  • Radar and satellite antenna array processing
  • Broadband communications
  • High-performance data acquisition
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9705: A Theoretical View of Coherent SamplingPDF13 Nov 201425 KB
AN9675: Coherent and Windowed Sampling with A/D ConvertersPDF13 Nov 2014160 KB
AN1715: Evaluation of Lower Resolution ADCs with KonverterPDF13 Nov 2014318 KB
AN002: Principles of Data Acquisition and ConversionPDF13 Nov 2014257 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
KAD5510P-50 DatasheetPDF31 May 2016789 KB
Design Files
TitleTypeUpdatedSizeOther Languages
KMB001 Evaluation Board Schematics and LayersPDF18 Nov 2014956 KB
KDC5512EVAL, KDC5512HEVAL, KDC5512-50EVAL, KDC5514EVAL Schematics and LayersPDF18 Nov 2014480 KB
KMB-001CEVALZ Design FilesZIP----4.49 MB
Software
TitleTypeUpdatedSizeOther Languages
MATLAB Component Runtime installerEXE31 Oct 2014162.95 MB
Intersil Konverter Analyzer installerEXE31 Oct 20141 MB
User Guides
TitleTypeUpdatedSizeOther Languages
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User GuidePDF12 May 2015827 KB
FMC ADC Evaluation Board User GuidePDF12 May 2015340 KB
ISLA112P50/55210EV1Z User GuidePDF13 Nov 20141.12 MB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
KAD5510P-50Q7272 Ld QFN0.242723260RoHS
KMB-FMC-EVALZN/ARoHS
KDC5512-50EVALZN/ARoHS
KMB-001LEVALZN/ARoHS
KMB-001CEVALZN/A
KAD5510P-50 Datasheet 31 May 2016
72 Ld QFN ISLA112P25M
IBIS Model for KAD5510P-50 10 Nov 2014
AN9705: A Theoretical View of Coherent Sampling 13 Nov 2014
AN9675: Coherent and Windowed Sampling with A/D Converters 13 Nov 2014
AN1715: Evaluation of Lower Resolution ADCs with Konverter 13 Nov 2014
AN002: Principles of Data Acquisition and Conversion 13 Nov 2014
KMB001 Evaluation Board Schematics and Layers 18 Nov 2014
KDC5512EVAL, KDC5512HEVAL, KDC5512-50EVAL, KDC5514EVAL Schematics and Layers 18 Nov 2014
KMB-001CEVALZ Design Files ----
MATLAB Component Runtime installer 31 Oct 2014
Intersil Konverter Analyzer installer 31 Oct 2014
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User Guide 12 May 2015
FMC ADC Evaluation Board User Guide 12 May 2015
ISLA112P50/55210EV1Z User Guide 13 Nov 2014