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MAX9310A：1:5 Clock Driver with Selectable LVPECL Inputs/Single-Ended Inputs and LVDS Outputs

The MAX9310A is a fast, low-skew 1:5 differential driver with selectable LVPECL inputs and LVDS outputs, designed for clock distribution applications. This device features an ultra-low propagation delay of 340ps with 48mA of supply current. The MAX9310A operates from a 3V to 3.6V power supply for use in 3.3V systems. A 2:1 input multiplexer is used to select one of two differential inputs. The input selection is controlled through the CLKSEL pin. This device features a synchronous enable function. The MAX9310A LVPECL inputs can be driven by either a differential or single-ended signal. A VBB reference voltage output is provided for use with single-ended inputs. The device can also accept differential HSTL signals. The MAX9310A is offered in a space-saving 20-pin TSSOP package and operates over the extended temperature range from -40°C to +85°C.

Key Features Guaranteed 1.0GHz Operating Frequency 8.0ps Output-to-Output Skew 340ps Propagation Delay Accepts LVPECL and Differential HSTL Inputs Synchronous Output Enable/Disable Two Selectable Differential Inputs 3V to 3.6V Supply Voltage On-Chip Reference for Single-Ended Operation ESD Protection: ±2kV (Human Body Model) Input Bias Resistors Drive Output Low for Open Inputs

MAX9310A: Typical Application Circuit Applications/Uses Automated Test Equipment (ATE) Central Office Backplane Clock Distribution Data and Clock Driver and Buffer DSLAM Wireless Base Stations

DataSheet

Parametrics

Quality and Environmental Data

• MAX9310A.pdf

Related Products

• MAX9317B：Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
• MAX9317C：Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
• MAX9317A：Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
• MAX9317：Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
• MAX9315：1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver

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