74AUP1G14GM: Low-power Schmitt trigger inverter
The 74AUP1G14 provides a single inverting Schmitt trigger which accepts standard input signals. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT− is defined as the input hysteresis voltage VH.
74AUP1G14GM: Product Block Diagram
Outline 3d SOT886
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V
- Low static power consumption; ICC = 0.9 μA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
- Multiple package options
- Specified from −40 °C to +85 °C and −40 °C to +125 °C
- Wave and pulse shaper
- Astable multivibrator
- Monostable multivibrator
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Low-power Schmitt trigger inverter (REV 6.0) PDF (437.0 kB) 74AUP1G14 [English] | 28 Jun 2012 |
Application Notes (4)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Pin FMEA for AUP family (REV 1.0) PDF (53.0 kB) AN11052 [English] | 06 May 2011 |
| MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English] | 30 Dec 2010 |
| PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English] | 30 Oct 2002 |
Brochures (3)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English] | 13 Oct 2014 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm (REV 1.0) PDF (189.0 kB) SOT886 [English] | 08 Feb 2016 |
Packing (2)
| Name/Description | Modified Date |
|---|---|
| XSON6; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering... (REV 2.0) PDF (205.0 kB) SOT886_115 [English] | 23 Apr 2013 |
| XSON6; reel pack; standard product orientation; 12NC ending 132 (REV 1.0) PDF (180.0 kB) SOT886_132 [English] | 28 Nov 2012 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
| MAR_SOT886 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT886 [English] | 03 Jun 2013 |
IBIS Model
- 74AUP1G14 IBIS model (REV 1.0)Updated ibs AUP1G14 10/28/2016
Ordering Information
| Product | Status | Family | VCC (V) | Function | Description | Logic switching levels | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP1G14GM | Active | AUP | 1.1 - 3.6 | Buffers/inverters/drivers | Schmitt-trigger | CMOS | +/- 1.9 | SOT886 | 4.7 | 70 | 1 | ultra low | -40~125 | 311 | 7.7 | 157 | XSON6 | 6 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP1G14GM | | SOT886 | Reflow_Soldering_Profile | Reel 7" Q1/T1, Q3/T4 | Active | 74AUP1G14GM,132 (9352 790 23132) | pF | 74AUP1G14GM |    | Always Pb-free | 0.0 | 3.29 | 3.04E8 | 1 | 1 |
| Reel 7" Q1/T1 | Active | 74AUP1G14GM,115 (9352 790 23115) | pF | 74AUP1G14GM | | Always Pb-free | 0.0 | 3.29 | 3.04E8 | 1 | 1 |
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- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
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- MicroPak soldering information NTS0102_Q100
- PicoGate Logic footprints NX3L4684
- 電圧レベルシフタ 74AVC16245DGG-Q100
- NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- ロジック製品セレクションガイド... 74LVC_H_245A_Q100
- Logic selection guide 2016 74LVC_H_245A_Q100
- MAR_SOT886 Topmark prtr5v0u2f
- 74AUP1G14 IBIS model 74AUP1G14GW
- XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm prtr5v0u2f
- Reflow_Soldering_Profile Wave_Soldering_Profile LPC1112FD20
- XSON6; reel pack; standard product orientation; 12NC ending 132 NCX2200GM
- XSON6; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering... prtr5v0u2f
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