74AUP2G0604GM: Low-power inverting buffer with open-drain and inverter

The 74AUP2G0604 is a single inverting buffer with open-drain output and a single inverter. It features two input pins (nA), an output pin (2Y) and an open-drain output pin (1Y).

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Outline 3d SOT886
Data Sheets (1)
Name/DescriptionModified Date
Low-power inverting buffer with open-drain and inverter (REV 1.0) PDF (226.0 kB) 74AUP2G0604 [English]23 Nov 2012
Application Notes (2)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]30 Dec 2010
Brochures (3)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English]13 Oct 2014
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Package Information (1)
Name/DescriptionModified Date
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm (REV 1.0) PDF (189.0 kB) SOT886 [English]08 Feb 2016
Supporting Information (2)
Name/DescriptionModified Date
Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English]30 Sep 2013
MAR_SOT886 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT886 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionTypePackage versionOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AUP2G0604GMActiveAUP1.1 - 3.6CombinationCMOSinverter with open-drain and inverterCombination gatesSOT886+/- 1.94702ultra low-40~1252906.5145XSON66
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AUP2G0604GMSOT886Reflow_Soldering_ProfileReel 7" Q3/T4, ReverseActive74AUP2G0604GMH (9352 996 53125)a674AUP2G0604GMAlways Pb-free11
Low-power inverting buffer with open-drain and inverter 74AUP2G0604GW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
MicroPak soldering information NTS0102_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
MAR_SOT886 Topmark prtr5v0u2f
IBIS model 74AUP2G0604GW
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm prtr5v0u2f
Reflow_Soldering_Profile Wave_Soldering_Profile LPC1112FD20
BGU8007