74AUP2G16GW: Low-power dual buffer
The 74AUP2G16 provides two low-power, low-voltage buffers.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and
fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow
current through the device when it is powered down.
SOT363
Data Sheets (1)
Name/Description | Modified Date |
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Low-power dual buffer (REV 2.0) PDF (161.0 kB) 74AUP2G16 [English] | 07 Oct 2016 |
Package Information (1)
Packing (1)
Supporting Information (3)
IBIS Model
Ordering Information
Product | Status | Family | VCC (V) | Description | Logic switching levels | Output drive capability (mA) | fmax (MHz) | No of bits | Power dissipation considerations | tpd (ns) | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins | Package version |
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74AUP2G16GW | Active | AUP | 1.1 - 3.6 | dual buffer | CMOS | +/- 1.9 | 70 | 2 | ultra low | 3.9 | -40~125 | 264 | 38.6 | 153 | TSSOP6 | 6 | SOT363 |
Package Information