74AUP3G34GT: Low-power triple buffer
The 74AUP3G34 is a triple buffer.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
times.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
74AUP3G34GT: Product Block Diagram
Outline 3d SOT833-1
Data Sheets (1)
Brochures (1)
Selector Guides (2)
Package Information (1)
Packing (1)
Supporting Information (1)
| Name/Description | Modified Date |
|---|
| MAR_SOT833 Topmark (REV 1.0) PDF (75.0 kB) MAR_SOT833 [English] | 03 Jun 2013 |
IBIS Model
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Package version | Output drive capability (mA) | fmax (MHz) | No of bits | tpd (ns) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|
| 74AUP3G34GT | Active | AUP | 1.1 - 3.6 | triple buffer | CMOS | triple buffer | SOT833-1 | +/- 1.9 | 70 | 3 | 3.9 | ultra low | -40~125 | 327 | 6.1 | 157 | XSON8 | 8 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | MSL | MSL LF |
|---|
| 74AUP3G34GT | | SOT833-1 | | Reel 7" Q1/T1 | Active | 74AUP3G34GTX
(9352 806 95115) | Standard Marking | 74AUP3G34GT |    | Always Pb-free | 1 | 1 |
