74LVC1G11GS: Single 3-input AND gate
The 74LVC1G11 provides a single 3-input AND gate.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
sot1202_3d
Data Sheets (1)
Application Notes (3)
Package Information (1)
Packing (1)
Supporting Information (1)
| Name/Description | Modified Date |
|---|
| MAR_SOT1202 Topmark (REV 1.0) PDF (49.0 kB) MAR_SOT1202 [English] | 03 Jun 2013 |
IBIS Model
Ordering Information
| Product | Status | Family | Function | VCC (V) | Type | Description | Logic switching levels | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|
| 74LVC1G11GS | Active | LVC | AND gates | 1.65 - 5.5 | AND gates | single 3-input AND gate | CMOS / LVTTL | SOT1202 | +/- 32 | 2.6 | 175 | 1 | low | -40~125 | 337 | 33.5 | 228 | XSON6 | 6 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|
| 74LVC1G11GS | | SOT1202 | | Reel 7" Q1/T1, Q3/T4 | Active | 74LVC1G11GS,132
(9352 928 99132) | VU | 74LVC1G11GS |    | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
