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HCF4021：8-Stage Static Shift Register

The HCF4021 is a monolithic integrated circuit fabricated in metal oxide semiconductor technology available in PDIP-16 and SO-16 packages.

This device is an 8-stage parallel or serial-input/serial-output register having common clock and parallel/serial control inputs, a single serial data input, and individual parallel "jam" inputs to each register stage. Each register stage is a D-type, master-slave flip-flop in addition to an output from stage 8. "Q" outputs are also available from stages 6 and 7. Serial entry is synchronous with the clock but parallel entry is asynchronous.

In this device, entry is controlled by the parallel/serial control input. When the parallel/serial control input is low, data are serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the parallel/serial control input is high, data are jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. The clock input of the internal stage is “forced” when asynchronous parallel entry is made. Register expansion using multiple packages is permitted.

Key Features

• Medium speed operation: 12 MHz (typ.) clock rate at VDD - VSS = 10 V
• Fully static operation
• 8 master-slave flip-flops plus output buffering and control gating
• Quiescent current specified up to 20 V
• 5 V, 10 V, and 15 V parametric ratings
• Input leakage current II = 100 nA (max.) at VDD = 18 V, TA = 25 °C
• 100% tested for quiescent current
• ESD performance
  • CDM: 1 kV
  • HBM: 2 kV
  • MM: 200 V

Product Specifications

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