技术参数

技术特性

• Operational Clock Frequency– 33 MHz– 66 MHz
• Organized as 2M x8
• Conforms to LPC Interface Specification v1.1– Support Multi-Byte Firmware Memory Read/Write Cycles
• Single 3.0-3.6V Read and Write Operations
• LPC Mode– 5-signal LPC bus interface for both in-systemand factory programming using programmerequipment– Multi-Byte Read data transfer rate15.6 MB/s @ 33 MHz PCI clock and31.2 MB/s @ 66 MHz clock- Firmware Memory Read cycle supporting1, 2, 4, 16, and 128 Byte Read- Firmware Memory Write cycle supporting1, 2, and 4 Byte Write– 33 MHz/66 MHz clock frequency operation– WP#/AAI and TBL# pins provide hardware Writeprotect for entire chip and/or top Boot Block– Block Locking Registers for individual block Read-Lock, Write-Lock, and Lock-Down protection– 5 GPI pins for system design flexibility– 4 ID pins for multi-chip selection– Multi-Byte capability registers(read-only registers)– Status register for End-of-Write detection– Program-/Erase-SuspendRead or Write to other blocks duringProgram-/Erase-Suspend
• Two-cycle Command Set
• Security ID Feature– 256-bit Secure ID space- 64-bit Unique Factory Pre-programmedDevice Identifier- 192-bit User-Programmable OTP
• Superior Reliability– Endurance: 100,000 Cycles (typical)– Greater than 100 years Data Retention
• Low Power Consumption– Active Read Current: 12 mA (typical)– Standby Current: 10 µA (typical)
• Uniform 4 KByte sectors– 35 Overlay Blocks: one 16-KByte Boot Block,two 8-KByte Parameter Blocks, one 32-KbyteParameter Block, thirty-one 64-KByte MainBlocks.
• Fast Sector-Erase/Program Operation– Sector-Erase Time: 18 ms (typical)– Block-Erase Time: 18 ms (typical)– Program Time: 7 µs (typical)
• Auto Address Increment (AAI) for Rapid FactoryProgramming (High Voltage Enabled)– RY/BY# pin for End-of-Write detection– Multi-Byte Program– Chip Rewrite Time: 4 seconds (typical)
• Packages Available– 32-lead PLCC– 32-lead TSOP (8mm x 14mm)– 40-lead TSOP (10mm x 20mm)
• All non-Pb (lead-free) devices are RoHS compliant