MC10H135: Dual Master-Slave JK Flip-Flop
The MC10H135 is a dual JK master-slave flip-flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset inputs overide the clock. A common clock is provided with separate Jbar-Kbar inputs. When the clock is static, the JK bar inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock.
特性- Propagation delay, 1.5 ns Typical
- Power Dissipation, 280 mW mV Typical/Pkg. (No Load)
- ftog 250 MHz Max
- Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
- Voltage Compensated
- MECL 10K Compatible
- Pb-Free Packages are Available
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应用注释 (10)
封装图纸 (2)
数据表 (1)
产品订购型号
| 产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| MC10H135FNG | Last Shipments | Pb-free
Halide free | PLLC-20 | 775-02 | 3 | Tube | 46 | |
| MC10H135FNR2G | Active | Pb-free
Halide free | PLLC-20 | 775-02 | 3 | Tape and Reel | 500 | 联系BDTIC |
| MC10H135PG | Last Shipments | Pb-free
Halide free | PDIP-16 | 648-08 | NA | Tube | 25 | |
订购产品技术参数
| Product | Type | Bits | Input Level | Output Level | VCC Typ (V) | tJitter Typ (ps) | tpd Typ (ns) | tsu Min (ns) | th Min (ns) | trec Typ (ns) | tR & tF Max (ps) | fToggle Typ (MHz) |
|---|
| MC10H135FNR2G | JK-Type | 2 | ECL | ECL | -5.2 | | 1.65 | 1.5 | 1 | | 2200 | 250 |
