NB3N5573DTGEVB: XTAL TO HCSL CLK GENERATR

The NB3N502 Evaluation Board was designed to provide a flexible and convenient platform to quickly evaluate, characterize and verify the performance and operation of the NB3N502 PLL Clock Multiplier. The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference clock signal source. The user's manual provides detailed information on the board's contents, layout and use, and it should be used in conjunction with the NB3N502 data sheet which contains full technical details on device specifications and operation.

特性
  • Crystal mount source, or input external clock source (SMA)
  • A TSSOP-16 NB3N5573DTG device is solder mounted or the board may be adapted for insertion testing by adding a TSSOP-16 socket.
  • Separate supply connectors for VDD (banana jack and Anvil Clip) and GND (banana jack)
NB3N5573DTGEVB 实物图

NB3N5573DTGEVB 实物图

评估板信息
评估板 状况 无铅(Pb-free) 简短说明 所用产品
NB3N5573DTGEVB Active   NB3N5573DTGEVB: XTAL TO HCSL CLK GENERATR NB3N5573DTG, NB3N5573DTR2G
技术文档
类型 文档标题 文档编号 修订号
Eval Board: Manual NB3N5573DTGEVB Manual NB3N5573DTGEVB_MANUAL.PDF 0