M27C4001-55C1 4兆位( 512Kb × 8 )紫外线可擦写可编程只读存储器和OTP存储器PLCC-32封装
ST提供独特的OTP和UV EPROM内存产品系列,存储容量范围为256Kbit到32Mbit,有标准和低电压型号可供选择。
所有的器件都有双列直插式封装和表面封装版本,其中包括 无铅封装。容量范围为1Mb到16Mb,所有器件都有 x8和x16两种组配方式。
这些技术特性:,加上高速存取能力,使得OTP和UV EPROM 成为一种创新型高性能解决方案。它们非常适合取代掩模ROM,具备最新软件的编程灵活性,并且避免了掩模ROM的成本。
ST将长期致力于EPROM的开发。ST将致力于和客户建立长期的业务伙伴关系,长期开发EPROM产品。
我们的持续投资证明这一点。无论是现在和将来,我们将在产能、工艺以及产品组合等方面投入大量资金,以巩固ST在EPROM领域的世界领袖地位。
The M27C4001 is a 4 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large programs and is organised as 524,288 by 8 bits.
The FDIP32W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not required, the M27C4001 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.
M27C4001-55C1 订购型号:
| Ordering Model | Package | RoHS Compliance Grade |
Marketing Status |
Pin Count |
Storage Capacity |
Supply Voltage (Vcc) |
Supply Voltage (Vcc) |
Memory Organization |
Address Access Time (tACC)(tACC) |
Chip Enable To Output Delay(tCE) |
Output Enable To Output Delay(tOE) |
General Description |
Programming Voltage (Vpp) |
Programming Current (IPP) |
Operating Temperature |
Operating Temperature |
Packing Type |
| nom | spec | min | max | nom | nom | nom | nom | nom | min | max | |||||||
| Mb | V | V | ns | ns | ns | V | mA | °C | °C | ||||||||
| M27C4001-10B1 | PDIP 32 .6 Cu .25 |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | 100 | 100 | 50 | OTP EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-10C1 | PLCC 32 | Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | 100 | 100 | 50 | OTP EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-10F1 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 100 | 50 | UV EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-12F1 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 100 | 50 | UV EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-12F6 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 100 | 50 | UV EPROM |
12.75 | 50 | -40 | 85 | Tube |
| M27C4001-35XF1 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 35 | 20 | UV EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-45XF1 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 45 | 25 | UV EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-55C1 | PLCC 32 | Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | 55 | 55 | 30 | OTP EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-80B1 | PDIP 32 .6 Cu .25 |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | 80 | 80 | 40 | OTP EPROM |
12.75 | 50 | 0 | 70 | Tube |
| M27C4001-80XF1 | CDIP 32 .280 F/S WITH LENS MSI |
Ecopack1 | Active | 32 | 4 | 4.5 | 5.25 | x8 | - | 80 | 40 | UV EPROM |
12.75 | 50 | 0 | 70 | Tube |
M27C4001-55C1 特性:
- 5V ± 10% supply voltage in Read operation
- Access time: 35ns
- Low power consumption:
– Active Current 30mA at 5MHz
– Standby Current 100μA - Programming voltage: 12.75V ± 0.25V
- Programming time: 100μs/Word
- Electronic signature
– Manufacturer Code: 20h
– Device Code: 41h - Packages
– ECOPACK? compliant versions
M27C4001-55C1 Device operation
The operating modes of the M27C4001 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature.
Read Mode
The M27C4001 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.
Standby Mode
The M27C4001 has a standby mode which reduces the supply current from 30mA to 100μA.
The M27C4001 is placed in the standby mode by applying a CMOS high signal to the Einput. When in the standby mode, the outputs are in a high impedance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a) the lowest possible memory power dissipation, b) complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
System Considerations
The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1μF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7μF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C4001 are in the '1' tate. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27C4001 is in the programming ode when VPP input is at 12.75V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V.
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 52.5 seconds. Programming with PRESTO II consists of applying a sequence of 100μs program pulses to each byte until a correct verify occurs (see Figure 5). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell.
M27C4001-55C1 技术支持与电子电路设计开发资源下载
- M27C4001 数据手册DataSheet .PDF
- M27C 系列型号命名 .JPG
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