54ACT11373 具有三态输出的八路透明 D 类锁存器

This 8-bit latch features 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the 54ACT11373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the enable is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly

54ACT11373
Voltage Nodes(V) 5, 3.3  
Rating Catalog  
54ACT11373 特性
54ACT11373 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
54ACT11373DL ACTIVE -40 to 85 1.75 | 1ku SSOP (DL) | 48 25 | TUBE  
54ACT11373DLG4 ACTIVE -40 to 85 1.75 | 1ku SSOP (DL) | 48 25 | TUBE  
54ACT11373DLR ACTIVE -40 to 85 1.45 | 1ku SSOP (DL) | 48 1000 | LARGE T&R  
54ACT11373DLRG4 ACTIVE -40 to 85 1.45 | 1ku SSOP (DL) | 48 1000 | LARGE T&R  
54ACT11373 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
54ACT11373DL Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 54ACT11373DL 54ACT11373DL
54ACT11373DLG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 54ACT11373DLG4 54ACT11373DLG4
54ACT11373DLR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 54ACT11373DLR 54ACT11373DLR
54ACT11373DLRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 54ACT11373DLRG4 54ACT11373DLRG4
54ACT11373 应用技术支持与电子电路设计开发资源下载
  1. 54ACT11373 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)