CD54HC4052 高速 CMOS 逻辑模拟多路复用器/多路解复用器

These devices are digitally controlled analog switches which utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers/demultiplexers control analog voltages that may vary across the voltage supply range (i.e. VCC to VEE). They are bidirectional switches thus allowing any analog input to be used as an output and vice-versa. The switches have low "on" resistance and low "off" leakages. In addition, all three devices have an enable control which, when high, disables all switches to their "off" state

CD54HC4052
Voltage Nodes(V) 6, 5, 2  
Rating Military
CD54HC4052 特性
CD54HC4052 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD54HC4052F ACTIVE -55 to 125 5.87 | 1ku CDIP (J) | 16 1 | TUBE  
CD54HC4052F3A ACTIVE -55 to 125 5.53 | 1ku CDIP (J) | 16 1 | TUBE  
CD54HC4052 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD54HC4052F TBD  A42   N/A for Pkg Type CD54HC4052F CD54HC4052F
CD54HC4052F3A TBD  A42   N/A for Pkg Type CD54HC4052F3A CD54HC4052F3A
CD54HC4052 应用技术支持与电子电路设计开发资源下载
  1. CD54HC4052 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)