These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the ´F374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output enable () input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly
SN54F374 | |
Voltage Nodes(V) | 5 |
Rating | Military |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SNJ54F374FK | ACTIVE | -55 to 125 | 9.75 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
SNJ54F374J | ACTIVE | -55 to 125 | 5.95 | 1ku | CDIP (J) | 20 | 1 | TUBE | |
SNJ54F374WD | ACTIVE | -55 to 125 | 10.35 | 1ku | CFP (W) | 20 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SNJ54F374FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54F374FK | SNJ54F374FK |
SNJ54F374J | TBD | A42 | N/A for Pkg Type | SNJ54F374J | SNJ54F374J |
SNJ54F374WD | TBD | Call TI | N/A for Pkg Type | SNJ54F374WD | SNJ54F374WD |