These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the ’HCT373 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.
An output-enable (OE)\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly
SN54HCT373 | |
Voltage Nodes(V) | 5 |
Rating | Military |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN54HCT373FK | ACTIVE | 5962-9074601M2A | 19.16 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
SN54HCT373J | ACTIVE | 5962-9074601MRA | 12.02 | 1ku | CDIP (J) | 20 | 1 | TUBE | |
SN54HCT373W | ACTIVE | 5962-9074601MSA | 13.44 | 1ku | CFP (W) | 20 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN54HCT373FK | TBD | POST-PLATE | N/A for Pkg Type | SN54HCT373FK | SN54HCT373FK |
SN54HCT373J | TBD | A42 | N/A for Pkg Type | SN54HCT373J | SN54HCT373J |
SN54HCT373W | TBD | Call TI | N/A for Pkg Type | SN54HCT373W | SN54HCT373W |