SN54LVC646A-SP 具有三态输出的抗辐射 V 类八路总线收发器和寄存器

The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation.

This device consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 shows the four fundamental bus-management functions that are performed with the SN54LVC646A device.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port is stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one register and B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

SN54LVC646A-SP
Voltage Nodes (V) 3.3,2.7,2.5,1.8    
Vcc range (V) 2.0 to 3.6    
Input Level 0.0 to 5.5    
Output Level LVTTL    
Output Drive (mA) 24    
No. of Outputs 8    
No. of Bits 8    
Static Current 0.01    
tpd max (ns) 7.4    
Technology Family LVC    
Rating Space
SN54LVC646A-SP 特性
SN54LVC646A-SP 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
5962-9762601VKA ACTIVE -55 to 125 185.90 | 1ku CFP (W) | 24 1 | TUBE  
SN54LVC646A-SP 应用手册
标题 类型 大小
选择合适的德州仪器 (TI) 信号开关 PDF 1091
CMOS 非缓冲反向器在振荡器电路中的使用 PDF 951
选择正确的电平转换解决方案 (Rev. A) PDF 635
How to Select Little Logic PDF 959
Shelf-Life Evaluation of Lead-Free Component Finishes PDF 1310
Understanding and Interpreting Standard-Logic Data Sheets PDF 857
Texas Instruments Little Logic Application Report PDF 359
TI IBIS File Creation, Validation, and Distribution Processes PDF 380
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA PDF 895
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices PDF 209
Implications of Slow or Floating CMOS Inputs PDF 101
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices PDF 115
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs PDF 105
CMOS Power Consumption and CPD Calculation PDF 89
LVC Characterization Information PDF 114
Live Insertion PDF 150
Input and Output Characteristics of Digital Integrated Circuits PDF 1708
Understanding Advanced Bus-Interface Products Design Guide PDF 253
SN54LVC646A-SP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
5962-9762601VKA TBD   A42   N/A for Pkg Type 5962-9762601VKA 5962-9762601VKA
SN54LVC646A-SP 应用技术支持与电子电路设计开发资源下载
  1. SN54LVC646A-SP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. (用户指南)LOGIC Pocket Data Book
  4. (用户指南)Signal Switch Data Book
  5. (用户指南)LVC and LV Low-Voltage CMOS Logic Data Book
  6. (选择指南)逻辑器件指南 2009 (Rev. Z)
  7. (选择指南)小尺寸逻辑器件指南 (Rev. D)
  8. 2008年第一季度通信基础设施方案指南 (Rev. G)
  9. Communications Infrastructure Solutions Guide 1Q2010
  10. Design Summary for WCSP Little Logic
  11. Standard Linear & Logic for PCs, Servers & Motherboards
  12. STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
  13. Military Low Voltage Solutions
  14. Low-Voltage Logic (LVC) Designer's Guide
  15. Logic Cross-Reference