SN74AS646 具有三态输出的八路寄存总线收发器

SN74AS646 描述

These devices consist of bus-transceiver circuits with 3-state or open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers.

Output-enable () and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either or both registers

SN74AS646
Voltage Nodes(V) 5  
Vcc range(V) 4.5 to 5.5  
Input Level TTL  
Output Level TTL  
No. of Outputs 8  
Static Current 82  
Technology Family ALS  
Rating Catalog  
SN74AS646 特性
SN74AS646 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AS646DW ACTIVE -40 to 85 4.35 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74AS646DWE4 ACTIVE -40 to 85 4.35 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74AS646DWG4 ACTIVE -40 to 85 4.35 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74AS646 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AS646DW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AS646DW SN74AS646DW
SN74AS646DWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AS646DWE4 SN74AS646DWE4
SN74AS646DWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AS646DWG4 SN74AS646DWG4
SN74AS646 应用技术支持与电子电路设计开发资源下载
  1. SN74AS646 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)