SN74CBTU4411 具有充电泵和预充电输出的 11 位 4 选 1 FET 多路复用器/多路解复用器 1.8V DDR-II 开关

The SN74CBTU4411 is a high-bandwidth, SSTL_18 compatible FET multiplexer/demultiplexer with low ON-state resistance (ron). The device utilizes an internal charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ron. The low and flat ron allows for minimal propagation delay and supports rail-to-rail signaling on data input/output (I/O) ports. The device also features very low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Matched ron and I/O capacitance among channels results in extremely low differential and rising/falling edge skew. This allows the device to show optimal performance in DDR-II applications.

The device is organized as an 11-bit 1-of-4 multiplexer/demultiplexer with a single switch-enable (EN)\ input

SN74CBTU4411
Number of Channels 11  
Configuration 11 X 1:4 MUX  
ron(max)(ohms) 17  
ICC(uA) 2500  
Technology Family CBT  
Vcc min(V) 1.7  
Vcc max(V) 1.9  
Voltage Node(V) 1.8  
RON Flatness(Max)(Ohms) 5  
ON Time(Max)(ns) 2.1  
OFF Time(Max)(ns) 2.1  
Rating Catalog  
Pin/Package 72NFBGA  
Approx. Price (US$) 2.75 | 1ku  
Operating Temperature Range(°C) 0 to 85
SN74CBTU4411 特性
SN74CBTU4411 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74CBTU4411GSTR PREVIEW 0 to 85   NFBGA (GST) | 72 2000 | LARGE T&R  
SN74CBTU4411ZSTR ACTIVE 0 to 85 2.75 | 1ku NFBGA (ZST) | 72 2000 | LARGE T&R  
SN74CBTU4411 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74CBTU4411GSTR       SN74CBTU4411GSTR SN74CBTU4411GSTR
SN74CBTU4411ZSTR Pb-Free (RoHS)  SNAGCU  Level-3-260C-168 HR SN74CBTU4411ZSTR SN74CBTU4411ZSTR
SN74CBTU4411 应用技术支持与电子电路设计开发资源下载
  1. SN74CBTU4411 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)