SN74LVC161284 具有三态输出的 19 位总线接口

The SN74LVC161284 is designed for 3-V to 3.6-V VCC operation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when DIR is high, and in the B-to-A direction when DIR is low. This device also has five drivers, which drive the cable side, and four receivers. The SN74LVC161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low.

SN74LVC161284
Technology Family LVC  
Voltage Nodes(V) 3.3, 2.7, 2.5, 1.8
SN74LVC161284 特性
SN74LVC161284 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LVC161284DL ACTIVE -40 to 85 3.90 | 1ku SSOP (DL) | 48 25 | TUBE  
SN74LVC161284DLR ACTIVE -40 to 85 3.30 | 1ku SSOP (DL) | 48 1000 | LARGE T&R  
SN74LVC161284 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LVC161284DL Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVC161284DL SN74LVC161284DL
SN74LVC161284DLR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVC161284DLR SN74LVC161284DLR
SN74LVC161284 应用技术支持与电子电路设计开发资源下载
  1. SN74LVC161284 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)