ADS41B29 12 位 250MSPS 缓冲低功耗 ADC

ADS41B29 说明

The ADS41B49/29 are a family of 14-bit/12-bit analog-to-digital converters (ADCs) with sampling rates up to 250MSPS and integrated analog input buffers. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The analog input pins have buffers, with benefits of constant performance and input impedance across a wide frequency range. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS41B49/29 have features such as digital gain and offset correction. The gain option can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. The integrated dc offset correction loop can be used to estimate and cancel the ADC offset.Ω

	ADS4126	ADS4129	ADS4146	ADS4149	ADS41B29	ADS41B49
Resolution(Bits)	12	12	14	14	12	14
Sample Rate (max)	160MSPS	250MSPS	160MSPS	250MSPS	250MSPS	250MSPS
Architecture	Pipeline	Pipeline	Pipeline	Pipeline	Pipeline	Pipeline
Power Consumption(Typ)(mW)	200	265	200	265	350	350
SINAD(dB)	70	69.65	72.5	72.14	68.45	70.96
SNR(dB)	70.5	70.4	73	72.9	69.2	71.7
SFDR(dB)	83	80	83	80	80	80
No Missing Codes(Bits)	12	12	14	14	12	14
ENOB(Bits)	11.33	11.27	11.75	11.7	11.07	11.5
No. of Supplies	1	1	1	1	2	2
Analog Voltage AV/DD(Min)(V)	1.7	1.7	1.7	1.7	1.7	1.7
Analog Voltage AV/DD(Max)(V)	1.9	1.9	1.9	1.9	1.9	1.9
Logic Voltage DV/DD(Min)(V)	1.7	1.7	1.7	1.7	1.7	1.7
Logic Voltage DV/DD(Max)(V)	1.9	1.9	1.9	1.9	1.9	1.9
Input Configuration Range	2V (p-p)	2V (p-p)	2V (p-p)	2V (p-p)	2V (p-p)	2V (p-p)
Reference Mode	Int	Int	Int	Int	Int	Int
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Pin/Package	48VQFN	48VQFN	48VQFN	48VQFN	48VQFN	48VQFN
# Input Channels	1	1	1	1	1	1
Operating Temp Range(Celsius)	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85

ADS41B29 特性

Integrated High-Impedance Analog Input Buffer
- Input Capacitance: 2pF
- DC Input Resistance: 10kΩ
Maximum Sample Rate: 250MSPS
Ultralow Power
- 1.8V Analog Power: 236mW
- 3.3V Buffer Power: 79mW
- I/O Power: 35mW (DDR LVDS)
High Dynamic Performance:
- SNR: 71.2dBFS at 170MHz for –2dBFS Input
- SFDR: 84.5dBc at 170MHz for –2dBFS Input
Output Interface
- Double Data Rate (DDR) LVDS with Programmable Swing and StrengthStandard Swing: 350mVLow Swing: 200mVDefault Strength: 100Ω Termination2x Strength: 50Ω Termination
- 1.8V Parallel CMOS Interface Also Supported
Programmable Gain up to 6dB for SNR/SFDR Trade-Off
DC Offset Correction
Supports Low Input Clock Amplitude Down to 400mVPP
Package: QFN-48 (7mm × 7mm)

ADS41B29 芯片订购指南

器件	状态	价格（美元）	封装 \| 引脚	封装数量 \| 封装载体
ADS41B29IRGZ25	PREVIEW	-40 to 85	VQFN (RGZ) \| 48
ADS41B29IRGZR	PREVIEW	-40 to 85	VQFN (RGZ) \| 48	2500
ADS41B29IRGZT	PREVIEW	-40 to 85	VQFN (RGZ) \| 48	250

ADS41B29 应用技术支持与电子电路设计开发资源下载

ADS41B29 数据资料 dataSheet 下载.PDF
TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
所选封装材料的热学和电学性质 (PDF 645 KB)
高速数据转换 (PDF 1967 KB)
Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
A Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF 461 KB)
A Spreadsheet for Calculating the Frequency Response of the ADS1250-54
Understanding the ADS1251, ADS1253, and ADS1254 Input Circuitry (PDF 39 KB)
Analog-to-Digital Converter Grounding Practices Affect System Performance (PDF 56 KB)
Principles of Data Acquisition and Conversion (PDF 50 KB)
Interleaving Analog-to-Digital Converters (PDF 64 KB)
What Designers Should Know About Data Converter Drift (PDF 95 KB)
Giving Delta-Sigma Converters a Gain Boost with a Front End Analog Gain Stage (PDF 70 KB)
Programming Tricks for Higher Conversion Speeds Utilizing Delta Sigma Converters (PDF 105 KB)

ADS41B29 工具与软件

名称	型号	公司	工具/软件类型
ADS4149 评估模块	ADS4149EVM	Texas Instruments	开发电路板/EVM
用于模数转换器的抗混淆计算工具	ANTIALIASINGCALC	Texas Instruments	计算实用程序
运算放大器至 ADC 电路拓扑计算器	ADC-INPUT-CALC	Texas Instruments	计算实用程序