CD4013B CMOS 双路 D 类触发器
CD4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q\ outputs. These devices can be used for shift register applications, and , by connecting Q\ output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or rest line, respectively.
The CD4013B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
|
CD4013B |
| Voltage Nodes(V) |
5, 10, 15 |
| Vcc range(V) |
3 to 18 |
| No. of Outputs |
4 |
| Technology Family |
CD4000 |
| Rating |
Military |
CD4013B 特性
- Set-Reset capability
- Static flip-flop operation — retains state indefinitely with clock level either "high" or "low"
- Medium-speed operation — 16MHz (typ.) clock toggle rate at 10 V
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Applications:
- Registers, counters, control circuits
CD4013B 芯片订购指南
| 器件 |
状态 |
温度 |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD4013BD |
ACTIVE |
-40 to 85 |
1.60 | 1ku |
SOIC (D) | 14 |
50 | TUBE |
|
| CD4013BDE4 |
ACTIVE |
-40 to 85 |
1.60 | 1ku |
SOIC (D) | 14 |
50 | TUBE |
|
| CD4013BDG4 |
ACTIVE |
-40 to 85 |
1.60 | 1ku |
SOIC (D) | 14 |
50 | TUBE |
|
| CD4013BDR |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
SOIC (D) | 14 |
2500 | LARGE T&R |
|
| CD4013BDRE4 |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
SOIC (D) | 14 |
2500 | LARGE T&R |
|
| CD4013BDRG4 |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
SOIC (D) | 14 |
2500 | LARGE T&R |
|
| CD4013BN |
ACTIVE |
-40 to 85 |
1.45 | 1ku |
PDIP (N) | 14 |
25 | TUBE |
|
| CD4013BNE4 |
ACTIVE |
-40 to 85 |
1.45 | 1ku |
PDIP (N) | 14 |
25 | TUBE |
|
| CD4013BPWLE |
OBSOLETE |
-40 to 85 |
|
TSSOP (PW) | 14 |
|
|
| CD4013BPWR |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
TSSOP (PW) | 14 |
2000 | LARGE T&R |
|
| CD4013BPWRE4 |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
TSSOP (PW) | 14 |
2000 | LARGE T&R |
|
| CD4013BPWRG4 |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
TSSOP (PW) | 14 |
2000 | LARGE T&R |
|
CD4013B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD4013BD |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BD |
CD4013BD |
| CD4013BDE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BDE4 |
CD4013BDE4 |
| CD4013BDG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BDG4 |
CD4013BDG4 |
| CD4013BDR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BDR |
CD4013BDR |
| CD4013BDRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BDRE4 |
CD4013BDRE4 |
| CD4013BDRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BDRG4 |
CD4013BDRG4 |
| CD4013BN |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4013BN |
CD4013BN |
| CD4013BNE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4013BNE4 |
CD4013BNE4 |
| CD4013BPWR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BPWR |
CD4013BPWR |
| CD4013BPWRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BPWRE4 |
CD4013BPWRE4 |
| CD4013BPWRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4013BPWRG4 |
CD4013BPWRG4 |
CD4013B 应用技术支持与电子电路设计开发资源下载
- CD4013B 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
