CD4572UB CMOS 六个门
CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates.
The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
| CD4572UB | |
| Output Level | 5,10,15 |
| Technology Family | CD4000 |
CD4572UB 特性
- Pin 7 NOR input positioned adjacent to VSS for easy use of gate as an inverter
- Pin 15 NAND input positioned adjacent to VDD for easy use of gate as an inverter
- Standard symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package-temperature range: 100 nA at 18 V and 25°C
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
CD4572UB 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD4572UBE | ACTIVE | -55 to 125 | 0.30 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD4572UBEE4 | ACTIVE | -55 to 125 | 0.30 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD4572UBM | ACTIVE | -55 to 125 | 0.32 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD4572UBME4 | ACTIVE | -55 to 125 | 0.32 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD4572UBMG4 | ACTIVE | -55 to 125 | 0.32 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD4572UBMT | ACTIVE | -55 to 125 | 0.75 | 1ku | SOIC (DW) | 16 | 250 | SMALL T&R | |
| CD4572UBMTE4 | ACTIVE | -55 to 125 | 0.75 | 1ku | SOIC (DW) | 16 | 250 | SMALL T&R | |
| CD4572UBMTG4 | ACTIVE | -55 to 125 | 0.75 | 1ku | SOIC (DW) | 16 | 250 | SMALL T&R | |
| CD4572UBNSR | ACTIVE | -55 to 125 | 0.30 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R | |
| CD4572UBNSRE4 | ACTIVE | -55 to 125 | 0.30 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R | |
| CD4572UBNSRG4 | ACTIVE | -55 to 125 | 0.30 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R | |
| CD4572UBPWR | ACTIVE | -55 to 125 | 0.27 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R | |
| CD4572UBPWRE4 | ACTIVE | -55 to 125 | 0.27 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R | |
| CD4572UBPWRG4 | ACTIVE | -55 to 125 | 0.27 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R |
CD4572UB 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD4572UBE | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD4572UBE | CD4572UBE |
| CD4572UBEE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD4572UBEE4 | CD4572UBEE4 |
| CD4572UBM | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBM | CD4572UBM |
| CD4572UBME4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBME4 | CD4572UBME4 |
| CD4572UBMG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBMG4 | CD4572UBMG4 |
| CD4572UBMT | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBMT | CD4572UBMT |
| CD4572UBMTE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBMTE4 | CD4572UBMTE4 |
| CD4572UBMTG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBMTG4 | CD4572UBMTG4 |
| CD4572UBNSR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBNSR | CD4572UBNSR |
| CD4572UBNSRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBNSRE4 | CD4572UBNSRE4 |
| CD4572UBNSRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBNSRG4 | CD4572UBNSRG4 |
| CD4572UBPWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBPWR | CD4572UBPWR |
| CD4572UBPWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBPWRE4 | CD4572UBPWRE4 |
| CD4572UBPWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD4572UBPWRG4 | CD4572UBPWRG4 |
CD4572UB 应用技术支持与电子电路设计开发资源下载
- CD4572UB 数据资料 dataSheet 下载.PDF
- TI 德州仪器特殊逻辑产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
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- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
