PLL1707-Q1 汽车类 3.3V 双路 PLL 多时钟发生器

The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins. The device gives customers both cost and space savings by eliminating external components and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs. The PLL1707 is ideal for MPEG-2 applications that use a 27-MHz master clock such as DVD recorders, HDD recorders, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes.

PLL1707-Q1
Supply Voltage(s) (V) 3.3    
Operating Temperature Range (C) -25 to 125    
Pin/Package 20SSOP/QSOP
Approx. Price (US$) 1.55 | 1ku
PLL1707-Q1 特性
PLL1707-Q1 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
PLL1707IDBQRQ1 ACTIVE -40 to 125 1.55 | 1ku SSOP/QSOP (DBQ) | 20 2000 | LARGE T&R  
PLL1707-Q1 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
PLL1707IDBQRQ1 Green (RoHS & no Sb/Br)   CU NIPDAU   Level-2-260C-1 YEAR PLL1707IDBQRQ1 PLL1707IDBQRQ1
PLL1707-Q1 应用技术支持与电子电路设计开发资源下载
  1. PLL1707-Q1 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器音频时钟选型与价格 . xls