SM320LC31-EP 增强型产品数字信号处理器
The SM320LC31-EP digital signal processor (DSP) is a 32-bit, floating-point processor manufactured in 0.6-um triple-level-metal CMOS technology. The device is part of the SMJ320C3x generation of DSPs from Texas Instruments.
The SM320LC31-EP internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 60 MFLOPS. The SM320LC31-EP optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.
The SM320LC31-EP can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time
|
SM320LC31-EP |
| Frequency (MHz) |
40 |
| MIPS |
20 |
| MOPS |
220 |
| Cycle Time (ns) |
50 |
| Data / Program Memory Space (Words) |
16M |
| RAM (Words) |
2K |
| Cache |
64 |
| DMA (Ch) |
1 |
| Timers |
2 |
| Total Serial Ports |
1 |
| Serial Ports |
1 |
| Boot Loader Available |
YES |
| Rating |
HiRel Enhanced Product |
SM320LC31-EP 特性
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product Change Notification
- Qualification Pedigree
- Operating Temperature Ranges:
- Military (M) –55°C to 125°C
- High-Performance Floating-Point Digital Signal Processor (DSP):
- SM320LC31-40EP (3.3 V)
50-ns Instruction Cycle Time
220 MOPS, 40 MFLOPS, 20 MIPS
- 32-Bit High-Performance CPU
- 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations
- 32-Bit Instruction and Data Words, 24-Bit Addresses
- Two 1K Word × 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks
- Boot-Program Loader
- 64-Word × 32-Bit Instruction Cache
- Eight Extended-Precision Registers
- Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
- Two Low-Power Modes
- On-Chip Memory-Mapped Peripherals:
- One Serial Port Supporting 8-/16-/24-/32-Bit Transfers
SM320LC31-EP 芯片订购指南
| 器件 |
状态 |
温度 |
价格(美元) |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SM320LC31PQM40EP |
ACTIVE |
-55 to 125 |
86.95 | 100u |
BQFP (PQ) | 132 |
36 | JEDEC TRAY (10+1) |
|
| V62/03617-01XE |
ACTIVE |
-55 to 125 |
86.95 | 100u |
BQFP (PQ) | 132 |
36 | JEDEC TRAY (10+1) |
|
SM320LC31-EP 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SM320LC31PQM40EP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72 HR |
SM320LC31PQM40EP |
SM320LC31PQM40EP |
| V62/03617-01XE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72 HR |
V62/03617-01XE |
V62/03617-01XE |
SM320LC31-EP 应用技术支持与电子电路设计开发资源下载
- SM320LC31-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器其它 TMS320™;DSP选型与价格 . xls
- JTAG/MPSD Emulation Technical Reference
- TMS320C3x Workstation Emulator Installation Guide
- TMS320C3x Evaluation Module Installation Guide
- 320C3x, 320C4x, and 320MCM42x Power-Up Sensitivity at Cold Temperatures
- Interfacing Memory to the TMS320C32 DSP
- Interfacing TI Clocked FIFOs With TI Floating-Point DSPs
- FIFO Synchronous Retransmit: Programmable DSP-Interface for FIR Filtering
- How TMS320 Tools Interact With the TMS320C32's Enhanced Memory Interface
- Engine Knock Detection Using Spectral Analysis With TMS320C25 or TMS320C30 DSPs
- Setting Up TMS320 DSP Interrupts in 'C'