SN65LVDS96 Serdes(串行器/解串器)接收器

The SN65LVDS96 LVDS serdes (serializer/deserializer) receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such asthe SN65LVDS95, over four balanced-pair conductors and expansion to 21 bits of single-ended LVTTL synchronous data at a lower transfer rate.

When receiving, the high-speed LVDS data is received and loaded into registers at the rate of seven times the LVDS input clock (CLKIN). The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. A phase-locked loop clock synthesizer circuit generates a 7× clock for internal clocking and an output clock for the expanded data

SN65LVDS96
Data Throughput(MB/s) 170.625  
Number of Parallel Outputs 21  
Serial Data Receiver Channels 3  
PLL Frequency(MHz) 20 - 68  
ICC(mA) 94  
Supply Voltage(s)(V) 3.3  
Pin/Package 48TSSOP  
Footprint SN65LVDS86  
Operating Temperature Range(C) -40 to 85  
Receiver tpd(ns) 8.7  
Receiver (Vth)(mV) +/-100  
Type of Line Circuit LVDS
SN65LVDS96 特性
SN65LVDS96 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN65LVDS96DGG ACTIVE -40 to 85 4.70 | 1ku TSSOP (DGG) | 48 40 | TUBE  
SN65LVDS96DGGG4 ACTIVE -40 to 85 4.70 | 1ku TSSOP (DGG) | 48 40 | TUBE  
SN65LVDS96DGGR ACTIVE -40 to 85 3.95 | 1ku TSSOP (DGG) | 48 2000 | LARGE T&R  
SN65LVDS96DGGRG4 ACTIVE -40 to 85 3.95 | 1ku TSSOP (DGG) | 48 2000 | LARGE T&R  
SN65LVDS96 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN65LVDS96DGG Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDS96DGG SN65LVDS96DGG
SN65LVDS96DGGG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDS96DGGG4 SN65LVDS96DGGG4
SN65LVDS96DGGR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDS96DGGR SN65LVDS96DGGR
SN65LVDS96DGGRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDS96DGGRG4 SN65LVDS96DGGRG4
SN65LVDS96 应用技术支持与电子电路设计开发资源下载
  1. SN65LVDS96 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器串行器和解串器选型与价格 . xls
  3. 所选封装材料的热学和电学性质 (PDF 645 KB)
  4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
  5. 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
  6. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
  7. 接口选择指南 (Rev. D) (PDF 2994 KB)
  8. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
  9. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
  10. Isolated RS-485 Reference Design (PDF 80 KB)
  11. 无铅组件涂层的保存期评估 (PDF 1305 KB)
  12. Analog Signal Chain Guide (8.62 MB)
  13. Industrial Interface IC Solutions (101 KB)
SN65LVDS96 工具和软件
培训内容 型号 软件/工具类型
SN65LVDS96 评估模块 SN65LVDS96EVM 开发电路板/EVM
SN65LVDS96 评估模块 SN65LVDS96EVM-021 开发电路板/EVM
SN65LVDS96 评估模块 SN65LVDS96EVM-034 开发电路板/EVM