TLV2548IPWRG4 12 位 200kSPS ADC，具有串行输出、自动断电（软件和硬件）、低功耗、8 x FIFO 和 8 通道

TLV2548IPWRG4 12 位 200kSPS ADC，具有串行输出、自动断电（软件和硬件）、低功耗、8 x FIFO 和 8 通道TSSOP-20封装

	TLV2548
Resolution(Bits)	12
Sample Rate (max)	200kSPS
Architecture	SAR
Power Consumption(Typ)(mW)	3.3
SINAD(dB)	70
SFDR(dB)	84
DNL(Max)(+/-LSB)	1
INL(Max)(+/-LSB)	1
No Missing Codes(Bits)	12
No. of Supplies	1
Analog Voltage AV/DD(Min)(V)	2.7
Analog Voltage AV/DD(Max)(V)	5.5
Logic Voltage DV/DD(Min)(V)	2.7
Logic Voltage DV/DD(Max)(V)	5.5
Input Configuration Range	+2V, +4V
Reference Mode	Int and Ext
Rating	Catalog
Pin/Package	20SOIC, 20TSSOP
# Input Channels	8
Operating Temp Range(Celsius)	-40 to 85,0 to 70

The TLV2548 and TLV2544 are a family of high performance, 12-bit low power, 3.86 µs, CMOS analog-to-digital converters (ADC) which operate from a single 2.7-V to 5.5-V power supply. These devices have three digital inputs and a 3-state output [chip select (CS)\, serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TI DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages.

TLV2548IPWRG4 特性

Maximum Throughput 200-KSPS
Built-In Reference, Conversion Clock and 8× FIFO
Differential/Integral Nonlinearity Error: ±1 LSB
Signal-to-Noise and Distortion Ratio: 70 dB, fi = 12-kHz
Spurious Free Dynamic Range: 75 dB, fi = 12- kHz
SPI (CPOL = 0, CPHA = 0)/DSP-Compatible Serial Interfaces With SCLK up to 20-MHz
Single Wide Range Supply 2.7 Vdc to 5.5 Vdc
Analog Input Range 0-V to Supply Voltage With 500 kHz BW
Hardware Controlled and Programmable Sampling Period
Low Operating Current (1.0-mA at 3.3-V, 1.1-mA at 5.5-V With External Ref
Power Down: Software/Hardware Power-Down Mode (1 µA Max, Ext Ref), Autopower-Down Mode (1 µA, Ext Ref)
Programmable Auto-Channel Sweep

TLV2548IPWRG4 芯片订购指南

器件	状态	温度(oC)	价格（美元）	封装 \| 引脚
TLV2548CDW	ACTIVE	0 to 70	5.40 \| 1ku	SOIC (DW) \| 20
TLV2548CDWG4	ACTIVE	0 to 70	5.40 \| 1ku	SOIC (DW) \| 20
TLV2548CDWR	ACTIVE	0 to 70	4.85 \| 1ku	SOIC (DW) \| 20
TLV2548CDWRG4	ACTIVE	0 to 70	4.85 \| 1ku	SOIC (DW) \| 20
TLV2548CPW	ACTIVE	0 to 70	5.40 \| 1ku	TSSOP (PW) \| 20
TLV2548CPWG4	ACTIVE	0 to 70	5.40 \| 1ku	TSSOP (PW) \| 20
TLV2548CPWR	ACTIVE	0 to 70	4.85 \| 1ku	TSSOP (PW) \| 20
TLV2548CPWRG4	ACTIVE	0 to 70	4.85 \| 1ku	TSSOP (PW) \| 20
TLV2548IDW	ACTIVE	-40 to 85	5.75 \| 1ku	SOIC (DW) \| 20
TLV2548IDWG4	ACTIVE	-40 to 85	5.75 \| 1ku	SOIC (DW) \| 20
TLV2548IDWR	ACTIVE	-40 to 85	5.20 \| 1ku	SOIC (DW) \| 20
TLV2548IDWRG4	ACTIVE	-40 to 85	5.20 \| 1ku	SOIC (DW) \| 20
TLV2548IPW	ACTIVE	-40 to 85	5.75 \| 1ku	TSSOP (PW) \| 20
TLV2548IPWG4	ACTIVE	-40 to 85	5.75 \| 1ku	TSSOP (PW) \| 20
TLV2548IPWR	ACTIVE	-40 to 85	5.20 \| 1ku	TSSOP (PW) \| 20
TLV2548IPWRG4	ACTIVE	-40 to 85	5.20 \| 1ku	TSSOP (PW) \| 20