TS3A4741 0.8Ω 低电压单电源双路 SPST 模拟开关

The TS3A4741/TS3A4742 are low ON-state resistance (ron), low-voltage, dual single-pole/single-throw (SPST) analog switches that operate from a single 1.6-V to 3.6-V supply. These devices have fast switching speeds, handle rail-to-rail analog signals, and consume very low quiescent power.

The digital logic input is 1.8-V CMOS compatible when using a single 3-V supply.

The TS3A4741 has two normally open (NO) switches, and the TS3A4742 has two normally closed (NC) switches. Both devices are available in 8-pin SOT-23 and MSOP packages

TS3A4741
Configuration 2 X SPST  
ron(max)(ohms) 0.9  
IL OFF(Max)(nA) N/A  
OFF Time(Max)(ns) 10  
ON Time(Max)(ns) 14  
Operating Temperature Range(°C) -40 to 85  
Pin/Package 8MSOP, 8SOT-23  
Approx. Price (US$) 0.30 | 1ku  
VCC(Min)(V) 3.6  
Voltage Nodes(V) 1.8, 2.5, 3.0, 3.3  
RON Flatness(Max)(Ohms) 0.4  
Technology Family TS  
ESD Rating(kV) 2kV HBM  
Bandwidth(MHz) 125  
Charge Injection(Max)(pC) 2  
RON Mis-match(Max)(Ohms) 0.05  
Voltage Node(V) 1.8, 2.5, 3.0, 3.3  
Vcc max(V) 3.6  
Vcc min(V) 1.65  
Number of Channels 2  
ICC(uA) 0.75  
Rating Catalog  
TS3A4741 特性
TS3A4741 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
TS3A4741DCNR ACTIVE -40 to 85 0.30 | 1ku SOT-23 (DCN) | 8 3000 | LARGE T&R  
TS3A4741DGKR ACTIVE -40 to 85 0.30 | 1ku MSOP (DGK) | 8 2500 | LARGE T&R  
TS3A4741DGKRG4 ACTIVE -40 to 85 0.30 | 1ku MSOP (DGK) | 8 2500 | LARGE T&R  
TS3A4741 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
TS3A4741DCNR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS3A4741DCNR TS3A4741DCNR
TS3A4741DGKR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS3A4741DGKR TS3A4741DGKR
TS3A4741DGKRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS3A4741DGKRG4 TS3A4741DGKRG4
TS3A4741 应用技术支持与电子电路设计开发资源下载
  1. TS3A4741 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)