TS5L100 具有低导通电阻的四路 SPDT 宽带网络开关

The TI TS5L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E)\ input. When E\ is low, the switch is enabled and the I port is connected to the Y port. When E\ is high, the switch is disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data path of the multiplexer/demultiplexer.

This device can be used to replace mechanical relays in LAN applications. This device has low ron, wide bandwidth, and low differential crosstalk, making it suitable for 10 Base-T, 100 Base-T, and various other LAN applications.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down

TS5L100
Voltage Nodes(V) 6, 6.5  
Vcc min(V) 6  
Vcc max(V) 6.5  
No. of Bits 4  
ron(max)(ohms) 19  
ICC(uA) 3  
tpd max(ns) 7
TS5L100 特性
TS5L100 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
TS5L100D ACTIVE 0 to 70 1.85 | 1ku SOIC (D) | 16 40 | TUBE  
TS5L100DBQR ACTIVE 0 to 70 1.55 | 1ku SSOP/QSOP (DBQ) | 16 2500 | LARGE T&R  
TS5L100DBQRE4 ACTIVE 0 to 70 1.55 | 1ku SSOP/QSOP (DBQ) | 16 2500 | LARGE T&R  
TS5L100DBQRG4 ACTIVE 0 to 70 1.55 | 1ku SSOP/QSOP (DBQ) | 16 2500 | LARGE T&R  
TS5L100DE4 ACTIVE 0 to 70 1.85 | 1ku SOIC (D) | 16 40 | TUBE  
TS5L100DG4 ACTIVE 0 to 70 1.85 | 1ku SOIC (D) | 16 40 | TUBE  
TS5L100DR ACTIVE 0 to 70 1.55 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
TS5L100DRE4 ACTIVE 0 to 70 1.55 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
TS5L100DRG4 ACTIVE 0 to 70 1.55 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
TS5L100PW ACTIVE 0 to 70 1.85 | 1ku TSSOP (PW) | 20 70 | TUBE  
TS5L100PWE4 ACTIVE 0 to 70 1.85 | 1ku TSSOP (PW) | 20 70 | TUBE  
TS5L100PWG4 ACTIVE 0 to 70 1.85 | 1ku TSSOP (PW) | 20 70 | TUBE  
TS5L100PWR ACTIVE 0 to 70 1.55 | 1ku TSSOP (PW) | 20 2000 | LARGE T&R  
TS5L100PWRE4 ACTIVE 0 to 70 1.55 | 1ku TSSOP (PW) | 20 2000 | LARGE T&R  
TS5L100PWRG4 ACTIVE 0 to 70 1.55 | 1ku TSSOP (PW) | 20 2000 | LARGE T&R  
TS5L100RGYR ACTIVE 0 to 70 1.55 | 1ku VQFN (RGY) | 16 3000 | LARGE T&R  
TS5L100RGYRG4 ACTIVE 0 to 70 1.55 | 1ku VQFN (RGY) | 16 3000 | LARGE T&R  
TS5L100 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
TS5L100D Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100D TS5L100D
TS5L100DBQR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR TS5L100DBQR TS5L100DBQR
TS5L100DBQRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR TS5L100DBQRE4 TS5L100DBQRE4
TS5L100DBQRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR TS5L100DBQRG4 TS5L100DBQRG4
TS5L100DE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100DE4 TS5L100DE4
TS5L100DG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100DG4 TS5L100DG4
TS5L100DR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100DR TS5L100DR
TS5L100DRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100DRE4 TS5L100DRE4
TS5L100DRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100DRG4 TS5L100DRG4
TS5L100PW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PW TS5L100PW
TS5L100PWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PWE4 TS5L100PWE4
TS5L100PWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PWG4 TS5L100PWG4
TS5L100PWR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PWR TS5L100PWR
TS5L100PWRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PWRE4 TS5L100PWRE4
TS5L100PWRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM TS5L100PWRG4 TS5L100PWRG4
TS5L100RGYR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR TS5L100RGYR TS5L100RGYR
TS5L100RGYRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR TS5L100RGYRG4 TS5L100RGYRG4
TS5L100 应用技术支持与电子电路设计开发资源下载
  1. TS5L100 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)