The XRD9824 is a complete linear CIS or CCD sensor signal processor on a single monolithic chip. The XRD9824 includes a high speed 14-bit resolution ADC, a 6-bit Programmable Gain Amplifier with gain adjustment of 1 to 10, and 8-bit programmable input referred offset calibration range of 800mV. In the CCD configuration the input signal is AC coupled with an external capacitor. An internal clamp sets the black level. In the CIS configuration, the clamp switch can be disabled and the CIS output signal is DC coupled from the CIS sensor to the XRD9824. The CIS signal is level shifted to VRB in order to use the full range of the ADC. In the CIS configuration the input can also be AC coupled similar to the CCD configuration. This enables CIS signals with large black levels to be internally clamped to a DC reference equal to the black level. The DC reference is internally subtracted from the input signal.
应用技术支持与电子电路设计开发资源下载 | 版本信息 | 大小 |
XRD9824 数据资料DataSheet下载:pdf | Rev.V2 | 2 页 |