MC100LVELT22:Translator, Dual LVTTL / LVCMOS to Differential LVPECL
The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.
技术特性
- 350ps Typical Propagation Delay
- <100ps Output-to-Output Skew
- ESD Protection: >4 KV HBM, >200 V MM
- Flow Through Pinouts
- The 100 Series Contains Temperature Compensation
- LVPECL Operating Range: VCC= 3.0 V to 3.8 V with GND= 0 V
- When Unused TTL Input is left Open, Q Output will Default High
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
- Transistor Count = 164 devices
- Pb-Free Packages are Available
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
MC100LVELT22DG |
Active |
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Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
SOIC-8 |
751-07 |
1 |
Tube |
98 |
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MC100LVELT22DR2G |
Active |
|
Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
SOIC-8 |
751-07 |
1 |
Tape and Reel |
2500 |
|
MC100LVELT22DTG |
Active |
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Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
TSSOP-8 |
948R-02 |
3 |
Tube |
100 |
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MC100LVELT22DTRG |
Active |
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Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
TSSOP-8 |
948R-02 |
3 |
Tape and Reel |
2500 |
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MC100LVELT22MNRG |
Active |
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Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
DFN-8 |
506AA |
1 |
Tape and Reel |
1000 |
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