MC10H135:Dual Master-Slave JK Flip-Flop
The MC10H135 is a dual J-K master-slave flip-flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset inputs overide the clock. A common clock is provided with separate Jbar-Kbar inputs. When the clock is static, the JKbar inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock.
技术特性
- Propagation Delay, 1.5 ns Typical
- Power Dissipation, 235 mW Typical
- Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
- Voltage Compensated
- MECL 10K Compatible
- Pb-Free Packages are Available
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封装图 MARKING DIAGRAM

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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
MC10H135FNG |
Active |
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Dual Master-Slave JK Flip-Flop |
PLLC-20 |
775-02 |
3 |
Tube |
46 |
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MC10H135FNR2G |
Active |
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Dual Master-Slave JK Flip-Flop |
PLLC-20 |
775-02 |
3 |
Tape and Reel |
500 |
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MC10H135PG |
Active |
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Dual Master-Slave JK Flip-Flop |
PDIP-16 |
648-08 |
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Tube |
25 |
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数据资料DataSheet下载