NB7L11M:2.5 V / 3.3 V, 12 Gb/s Differential 1:2 Clock/Data Fan-out Buffer/Translator with CML Outputs & Internal Termination Resistors
The NB7L11M is a differential 1-to-2 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively.
特性
- Maximum Input Clock up to 8 GHz Typical
- Maximum Input Data Rate up to 12Gb/s Typical
- < 0.5 ps of RMS Clock Jitter
- < 10 ps of Data Dependent Jitter
- 30 ps Typical Rise and Fall Times
- 110 ps Typical Propogation Delay
- 3 ps Typical Within Device Skew
- Operatiing Range: VCC = 2.375V to 3.465V with VEE = 0V
- CML Output Level (400 mV Peak-to-Peak Output) Differential Output Only
- 50 Ω Internal Input and Output Termination Resistors
- Functionally Compatible with Existing 2.5V / 3.3V LVEL,LVEP, EP, and SG DEvices
- Pb-Free Packages are Available
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封装图 PACKAGE DIMENSIONS
![NB7L11M封装图](/image/on/QFN-16_PACKAGE_DIMENSIONS.jpg)
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
NB7L11MMNG |
Active |
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2.5 V 7GHz / 10Gbps Differential Input to 1.8V / 2.5 V 1:4 CML Clock / Data Fanout Buffer w/ Selectable Input Equalizer |
QFN-16 |
485G-01 |
1 |
Tube |
123 |
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NB7L11MMNHTBG |
Active |
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2.5 V 7GHz / 10Gbps Differential Input to 1.8V / 2.5 V 1:4 CML Clock / Data Fanout Buffer w/ Selectable Input Equalizer |
QFN-16 |
485G-01 |
1 |
Tape and Reel |
100 |
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