NB7V32M:1.8 V / 2.5 V, 10 GHz ÷·2 Clock Divider with CML Outputs
The NB7V32M is a differential divide-by-2 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V32M produces a divide-by-2 output copy of an input Clock operating up to 10GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the Reset allows for the synchronization of multiple NB7V32M's in a system. The 16mA differential CML output provides matching internal 50-ohm termination which guarantees 400mV output swing when externally receiver terminated with 50-ohm to VCC. The
技术特性
- Maximum Input Clock Frequency > 10 GHz, typical
- Random Clock Jitter < 0.8ps RMS
- 30ps Typical Rise and Fall Times
- Differential CML Outputs, 400mV peak-to-peak, typical
- -40C to +85C Ambient Operating Temperature
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| NB7V32MMNG |
Active |
|
1.8 V / 2.5 V, 10 GHz ÷·2 Clock Divider with CML Outputs |
QFN-16 |
485G-01 |
1 |
Tube |
123 |
|
| NB7V32MMNHTBG |
Active |
|
1.8 V / 2.5 V, 10 GHz ÷·2 Clock Divider with CML Outputs |
QFN-16 |
485G-01 |
1 |
Tape and Reel |
100 |
|
| NB7V32MMNTXG |
Active |
|
1.8 V / 2.5 V, 10 GHz ÷·2 Clock Divider with CML Outputs |
QFN-16 |
485G-01 |
1 |
Tape and Reel |
3000 |
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