Spartan®-6 FPGA 为成本敏感型应用带来了低风险、低成本和低功耗的最佳平衡,现通过 ISE Design Suite 不仅将功耗降低了 42%,同时还将性能提高了 12%。Spartan-6 FPGA 可提供先进电源管理技术、多达150,000 个逻辑单元、集成 PCI Express® 模块、高级存储器支持、 250 MHz DSP slice 以及3.2Gbps 低功耗收发器。
Spartan-6 FPGA 系列 优点硬 IP 和可编程性的智能组合实现了更高的集成度
通过有效的功耗管理实现产品差异化
轻松满足系统级要求
Virtex-7 系列由 T、XT 和 HT 器件组成,可满足不同的市场需求:Virtex-7 T devices deliver unprecedented levels of capacity and performance enabling ASIC prototyping, emulation and replacement
Virtex-7 XT devices offer the highest processing bandwidth with high performance transceivers, DSP and BRAM
Virtex-7 HT devices with integrated 28Gb/s serial transceivers offer an unprecedented 2.78Tb/s of serial bandwidth
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Spartan-6 FPGA 对比列表
业界领先的系统解决方案Virtex-7 FPGA 具有业界最高带宽和最低功耗,可满足网络基础设施永无止境的带宽需求。 这些器件可提供2.78Tb/s 的串行带宽,从而使通信设备制造商能够在现有用电和制冷成本下提高新一代硬件的网络容量。
Spartan-6 相关
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描述 | 修改 | 大小 |
DS160:7 Series FPGA Overview | v1.7 | 308 KB |
DS162:Spartan-6 FPGA Data Sheet:DC and Switching Characteristics | v2.4 | 1.86 MB |
WP368:Unlock New Levels of Productivity for Your Design Using ISE Design Suite 12。 ISE® Design Suite v12 is the production-optimized tool suite for Virtex®-6 and Spartan®-6 FPGAs that delivers innovation in three critical areas of FPGA design: power reduction, productivity, and performance. |
ver 1.0 | 509 KB |
WP370:Reducing Switching Power with Intelligent Clock Gating 。 Xilinx delivers the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30% for Virtex®-6, Spartan®-6, Kintex™-7 and Virtex-7 FPGA designs. |
ver 1.3 | 395 KB |
WP396:High-Volume Spartan-6 FPGAs: Performance and Power Leadership by Design。 The purpose of this white paper is to describe how Spartan®-6 FPGAs address the needs of high-volume systems. The ability to connect efficiently and inexpensively to commodity memories, high-performance chip-to-chip interface capability, and innovative power down modes are just a few of the problems solved by high-performance, low-power, and low-cost Spartan-6 FPGAs. |
ver 1.0 | 722 KB |