LAN89218

In addition to an integrated Media Access Controller (MAC), Microchip’s LAN89218 includes a physical interface (PHY) and an SRAM-like slave port, which is a simple, yet highly functional Host Bus Interface. This interface provides a glueless connection to most common 32-bit and 16-bit microprocessors and microcontrollers. Additionally, a programmable interrupt controller allows optimizing performance by selecting polarity, de-assertion interval, and an open-drain output configuration. A General Purpose (GP) timer can be used to generate periodic host interrupts.

The LAN89218 also includes deep transmit and receive data FIFOs interfacing the high-speed HBI to accommodate high-bandwidth and long-latency applications. The FIFOs act as a buffer between the HBI and MAC, passing all transmitted and received data and status information on separate paths.

Integrated checksum offload engines located in the MAC enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading these tasks from the CPU. Memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The Ethernet MAC also supports features for reducing/eliminating packet loss. If the FIFO gets too full, the LAN89218 can automatically generate flow control packets to the remote node (when working in full-duplex mode) or assert back-pressure on the remote node (when working in half-duplex mode). Additionally, the MAC provides enhanced programmable features designed to minimize host supervision, bus utilization, and pre- or post-message processing. These features include the ability to disable retries after a collision and checksum calculation for transmit and receive operations. With its internally separated transmit and receive data paths, the LAN89218 is optimized for high-performance applications, especially in full-duplex mode.The data paths manage both the payload and the status data.

The PHY, which interfaces to the MAC and LAN, can be configured for either 10 or 100 Mbps Ethernet operation in full- and half-duplex mode. It also supports HP Auto-MDIX for detection and correction of crossed Ethernet cabling. Microchip automotive grade devices are specifically designed, fabricated, tested, characterized, qualified, and supported for use in automotive applications. TrueAuto robustness begins with proprietary design for reliability techniques within the silicon IC itself as well as in the design of the package. Extensive technologies and processes, such as enhanced monitors, are used in fabrication of TrueAuto products in order to continuously drive improvements in accordance with Microchip's zero Defects per Million (DPM) goals. Product qualification is focused on the most demanding customer expectations and exceeds many of the automotive reliability standards including AEC-Q100. Microchip TrueAuto services are provided by a dedicated organization composed of sales, marketing, applications engineering, operations, quality, and product support personnel specialized in meeting the requirements of the automotive customer.

产品特性
  • Diagnostic interface for dealership service bay
  • Fast software download interface (e.g. OBD connector)
  • Gateway service interface for dealership, aftermarket, repair shop
  • In-vehicle engineering development interface
  • Vehicle manufacturing test interface for production plant assembly line
技术参数
Parameter Name Value Value
Description 10Based-T/100Based-TX Ethernet Controller with 32 bit interface 10Based-T/100Based-TX Ethernet Controller with 32 bit interface
Ethernet Bandwidth 10Base-T/ 100Base-TX 10Base-T/ 100Base-TX
MAC Yes Yes
PHY Yes Yes
TX/RX RAM Buffer(Bytes) 16K 16K
Interrupt Pin 1 1
LEDs 3 3
Op. Voltage (V) 3.3 3.3
# Ethernet Ports Ethernet x1 Ethernet x1
Interface 32 bit Host Bus 32 bit Host Bus
Temp. Range Min. (°C) -40 -40
Temp. Range Max. (°C) 85 85
文档资料
LAN89218 - High-Performance Single-Chip 10/100 Ethernet ControllerData Sheets12/01/20151184KB
AN2157 - Transient Protection in Power Over Ethernet ApplicationsAppNote05/24/2016229KB
LAN89218 Sell SheetBrochures12/18/2013793KB
LAN89218 IBIS ModelIBIS12/09/2011266KB
LAN91xx/LAN92xx/LAN9311/LAN9312 eBoot Driver for XScale ProcessorSoftware Library06/01/2007
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux Driver on SH3 ProcessorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux driver on XScale processorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Windows CE 5.0 & 6.0 DriverSoftware Library01/29/2014
Design Guide, Ethernet Front End (Generic)Software Library08/24/20131KB
Design Guide, General ESD GuidelinesSoftware Library08/24/20131KB
Design Guide, General PCB Design GuidelinesSoftware Library08/24/20131KB
Schematic Design Guide, Xtal Load Capacitance CalculationSoftware Library08/24/20131KB
Component Placement Checklist, LAN89218, 100-pin TQFP PackageDesign Checklist08/24/20131KB
Schematic Checklist, LAN89218, 100-pin TQFP PackageDesign Checklist08/24/20131KB
LAN89218 100-pin TQFP Package Component Placement ChecklistDesign Checklist06/29/2009134KB
LAN89218 100-pin TQFP Package Routing ChecklistDesign Checklist06/29/200992KB
LAN89218 TQFP Rev C Schematic ChecklistDesign Checklist01/15/2010136KB
Routing Checklist, LAN89218, 100-pin TQFP PackageDesign Checklist08/24/20131KB
LAN89218 Evaluation BoardGerber Files04/16/2012447KB
LAN89218 Evaluation BoardSchematics04/16/20122569KB
LAN89218 Evaluation BoardSchematics04/16/201266KB
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器件无铅环保信息
PartNumberDeviceWeightShippingWeightLeadCountPackageTypePackageWidthSolderCompositionJEDECIndicatorRoHSChinaEFUP
LAN89218AQR-B0.5804001.600000100LQFP14x14x1.6mmMatte Tine3
LAN89218AQ-B0.5804006.666667100LQFP14x14x1.6mmMatte Tine3
LAN89218 - High-Performance Single-Chip 10/100 Ethernet Controller LAN89218
AN2157 LAN9353
LAN89218 Sell Sheet LAN89218
LAN89218 100-pin TQFP Package Component Placement Checklist LAN89218
LAN89218 100-pin TQFP Package Routing Checklist LAN89218
LAN89218 TQFP Rev C Schematic Checklist LAN89218
LAN89218 Evaluation Board LAN89218
LAN89218 Evaluation Board LAN89218