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SPC58NE84C3：32-bit Power Architecture MCU for High Performance Applications

SPC58NExx family is the first member of the new SPC58NExx family of 32-bit Flash Automotive MCUs offering a hardware based solution able to answer both ISO26262 ASIL-D compliant and high-performance real-time system requirements for mid/high-end powertrain applications.

Note: This document is preliminary and subject to any change without notification.

Key Features

• Two 32-bit Power Architecture® VLE compliant CPU core (e200z4d), dual issue, one of them being paired in lockstep
  • Single-precision floating point operations
  • 8 kB I-Cache and 4 kB D-Cache
  • 16 kB local instruction SRAM and 64 kB local data SRAM
• One 32-bit Power Architecture® VLE compliant CPU core (e200z4d), dual issue, paired in lockstep
  • Single-precision floating point operations
  • Lightweight Signal Processing Auxiliary Processing Unit (LSP APU) instruction support for digital signal processing (DSP)
  • 8 kB I-Cache
  • 16 kB local instruction SRAM and 32 kB local data SRAM
• 6320 kB on-chip flash memory
  • Supporting EEPROM emulation (256 kB)
  • 2 Flash Controller supporting true Read-While-Read Flash access (RWR)
• 608 kB on-chip general-purpose SRAM (+160 kB data RAM included in the CPUs)
• Multi-channel direct memory access controller (eDMA) with 96 channels, paired in lock-step
• Dual phase-locked loops, including one frequency-modulated
• Hardware Security Module (HSM) to provide robust integrity checking of flash memory
• Generic timer module (GTM)
  • Intelligent complex timer module
  • 144 channels (40 inputs/104 outputs)
  • 5 programmable fine grain multi-threaded cores
  • 61 kB of dedicated SRAM
  • Hardware support for engine control, motor control and safety related applications
• Enhanced analog-to-digital converter system with:
  • 5 separate 12-bit SAR analog converters, 46 channels, 1.5 μs conversion time, TUE ±4 LSB
  • 3 separate 10-bit SAR analog converters, 16 channels, 1.0μs conversion time, TUE ±2 LSB
  • 6 separate 16-bit Sigma-Delta analog converters, 20 channels
• 10 Deserial Serial Peripheral Interface (DSPI) modules, 18 LIN and UART communication interface (LINFlexD) modules, including 2 Micro Second Bus (MSB) channels
• 7 Modular Controller Area Network (M_CAN), all ISO CAN-FD compliant, and 1 Time-Triggered Controller Area Network (M_TTCAN)
• Dual-channel FlexRay controller, 128 channels
• 15 SENT, 2 PSI5, 1 PSI5-S Hardware Sensor Interfaces
• Boot Assist Module (BAM) through UART/LIN & CAN
• Nexus development interface (NDI) per IEEEISTO 5001-2003 standard, with partial support for 2010 standard.
• Device and board test support per Joint Test Action Group (JTAG) (IEEE 1149.1)
• Three Supply Controller options
  • Dual Supply Controller, 5 V or 3.3 V supply voltage for I/Os, 1.2 V supply voltage for core logic (eLQFP176/LFBGA292)
  • 5 V or 3.3 V on-chip Linear Voltage Regulator with external Ballast (LFBGA292)
  • 5 V DC-DC Voltage Regulator (eLQFP176 / LFBGA292)
• Designed for eLQFP176 0.5 mm pitch, LFBGA292 0.8 mm pitch

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