Provides Low-Cost, Secure Bidirectional Authentication Over a Single Contact for Low-Power Applications
The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E02 has its own guaranteed unique 64-bit ROM registration number that is factory installed into the chip. The DS28E02 communicates over the single-contact 1-Wire® bus. The communication follows the standard 1-Wire protocol with the registration number acting as the node address in the case of a multidevice 1-Wire network.
title | Download file |
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DS28E02 Data Sheet | DS28E02.pdf |
Errata DS28E02 | DS28E02_A1.pdf |
Part Number | Memory Type | Memory Size | Bus Type | VSUPPLY (V) | Oper. Temp. (°C) | Package/Pins |
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DS28E02 | EEPROM | 1K x 1 | 1-Wire | 1.75 to 3.65 | -20 to +85 | TDFN-EP/6 TSOC/6 |
Part Number | Status | Recommended Replacement | Package | Temp | RoHS |
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DS28E02P+ | Active | TSOC,;6 pin;17.8 mm² | -40°C to +85°C | Lead Free | |
DS28E02P+T&R | Active | TSOC,;6 pin;17.8 mm² | -40°C to +85°C | Lead Free | |
DS28E02Q+T&R | Active | TDFN-EP,;6 pin;9.6 mm² | -40°C to +85°C | Lead Free | |
DS28E02Q+U | Active | TDFN-EP,;6 pin;9.6 mm² | -40°C to +85°C | Lead Free |