MAX5863:Ultra-Low-Power, High-Dynamic Performance, 7.5Msps Analog Front End

The MAX5863 ultra-low-power, highly integrated analog front end is ideal for portable communication equipment such as handsets, PDAs, WLAN, and 3G wireless terminals. The MAX5863 integrates dual 8-bit receive ADCs and dual 10-bit transmit DACs while providing the highest dynamic performance at ultra-low power. The ADCs' analog I-Q input amplifiers are fully differential and accept 1VP-P full-scale signals. Typical I-Q channel phase matching is ±0.03° and amplitude matching is ±0.03dB. The ADCs feature 48.5dB SINAD and 69dBc spurious-free dynamic range (SFDR) at fIN = 1.875MHz and fCLK = 7.5Msps. The DACs' analog I-Q outputs are fully differential with ±400mV full-scale output, and 1.4V common-mode level. Typical I-Q channel phase match is ±0.15° and gain match is ±0.05dB. The DACs also feature dual 10-bit resolution with 73dBc SFDR, and 61dB SNR at fOUT = 620kHz and fCLK = 7.5MHz. The ADCs and DACs operate simultaneously or independently for frequency-division duplex (FDD) and time-division duplex (TDD) modes. A 3-wire serial interface controls power-down and transceiver modes of operation. The typical operating power is 22.8mW at fCLK = 7.5Msps with the ADCs and DACs operating simultaneously in transceiver mode. The MAX5863 features an internal 1.024V voltage reference that is stable over the entire operating power-supply range and temperature range. The MAX5863 operates on a +2.7V to +3.3V analog power supply and a +1.8V to +3.3V digital I/O power supply for logic compatibility. The quiescent current is 3.5mA in Idle Mode™ and 1µA in shutdown mode. The MAX5863 is specified for the extended (-40°C to +85°C) temperature range and is available in a 48-pin thin QFN package. See a parametric table of the complete family of pin-compatible AFEs.

Key Features
  • Integrated Dual 8-Bit ADCs and Dual 10-Bit DACs
  • Ultra-Low Power
    • 22.8mW at fCLK = 7.5MHz (Transceiver Mode)
    • 20.7mW at fCLK = 5.2MHz (Transceiver Mode)
    • Low-Current Idle and Shutdown Modes
  • Excellent Dynamic Performance
    • 48.5dB SINAD at fIN = 1.875MHz (ADC)
    • 73dBc SFDR at fOUT = 620kHz (DAC)
  • Excellent Gain/Phase Match
    • ±0.03° Phase, ±0.03dB Gain at fIN = 1.875MHz (ADC)
  • Internal/External Reference Option
  • +1.8V to +3.3V Digital Output Level (TTL/CMOS Compatible)
  • Multiplexed Parallel Digital Input/Output for ADCs/DACs
  • Miniature 48-Pin Thin QFN Package (7mm x 7mm)
  • Evaluation Kit Available (Order MAX5865EVKIT)
MAX5863: Functional Diagram
MAX5863: Functional Diagram
Applications/Uses
  • 3G Wireless Terminals
  • Fixed/Mobile Broadband Wireless Modems
  • Narrowband/Wideband CDMA Handsets
  • PDAs
DataSheet
titleDownload file
MAX5863 Data SheetMAX5863.pdf
Parametrics
Part NumberInput Chan.Conv. Speed
(Msps)
SNR
(dB)
Resolution
(bits)
Output Chan.Speed
(Msps)
SFDR
(dBc)
THD
(dBc)
Noise Spectral Density
(dBFS/Hz)
VSUPPLY
(V)
Package/Pins
ADCADC@ fINDACDACDAC@ fOUT@ fOUT@ fOUT
MAX586327.548.6 @ 1.875MHz1027.573 @ 620kHz-71 @ 620kHz-127 @ 620kHz1.8
2.7 to 3.3
TQFN/48
Design kits & evaluation modules
Related Products
  • MAX5866:Ultra-Low-Power, High-Dynamic-Performance, 60Msps Analog Front End
  • MAX5864:Ultra-Low-Power, High-Dynamic-Performance, 22Msps Analog Front End
  • MAX5865:Ultra-Low-Power, High-Dynamic-Performance, 40Msps Analog Front End
Ordering Information
Part NumberStatusRecommended ReplacementPackageTempRoHS
MAX5863ETMNo Longer AvailableMAX5863ETM+TQFN,;48 pin;50.4 mm²-40°C to +85°CNo
MAX5863ETM+ActiveTQFN,;48 pin;50.4 mm²-40°C to +85°CLead Free
MAX5863ETM+TActiveTQFN,;48 pin;50.4 mm²-40°C to +85°CLead Free
MAX5863ETM-TNo Longer AvailableMAX5863ETM+TQFN;-40°C to +85°CSee data sheet
MAX5863.pdf MAX5863
MAX5863.pdf MAX5863